MT40A512M16JY-075EAIT Datasheet, PDF (267/358 Pages) Micron Technology – 8Gb: x4, x8, x16 DDR4 SDRAM

8Gb: x8, x16 Automotive DDR4 SDRAM
Electrical Characteristics – AC and DC Single-Ended Input
Measurement Levels
The following figure shows the Rx mask relationship to the input timing specifications
relative to system ^tDS and ^tDH. The classical definition for ^tDS/^tDH required a DQ rising
and falling edges to not violate ^tDS and ^tDH relative to the DQS strobe at any time; how-
ever, with the Rx mask ^tDS and ^tDH can shift relative to the DQS strobe provided the
input pulse width specification is satisfied and the Rx mask is not violated.
Figure 207: Rx Mask Relative to ^tDS/^tDH
TdiPW
Rx
Mask
t_f1
TdiVW
V_IH(DC)
0.5 × V_diVW
V_{CENTDQ,pin mean}
0.5 × V_diVW
V_IL(DC)
t_r1
DQS_c
t_{DS = Greater of 0.5 × TdiVW}
or
0.5 × (TdiPW + V_diVW/^tf1)
t_{DH = Greater of 0.5 × TdiVW}
or
0.5 × (TdiPW + V_diVW/^tr1)
DQS_t
The following figure and table show an example of the worst case Rx mask required if
the DQS and DQ pins do not have DRAM controller to DRAM write DQ training. The
figure and table show that without DRAM write DQ training, the Rx mask would in-
crease from 0.2UI to essentially 0.54UI. This would also be the minimum ^tDS and ^tDH
required as well.
CCMTD-1406124318-10419
8gb_auto_ddr4_dram.pdf - Rev. C 3/17 EN
267
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