70291E Datasheet, PDF (86/436 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
6.1 System Reset
The dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/
X04 and dsPIC33FJ128MCX02/X04 family of devices
have two types of Reset:
• Cold Reset
• Warm Reset
A cold Reset is the result of a Power-on Reset (POR)
or a Brown-out Reset (BOR). On a cold Reset, the
FNOSC configuration bits in the FOSC device
configuration register selects the device clock source.
A warm Reset is the result of all other reset sources,
including the RESET instruction. On warm Reset, the
device will continue to operate from the current clock
source as indicated by the Current Oscillator Selection
bits (COSC<2:0>) in the Oscillator Control register
(OSCCON<14:12>).
The device is kept in a Reset state until the system
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The description of
the sequence in which this occurs is shown in
Figure 6-2.
TABLE 6-1: OSCILLATOR DELAY
Oscillator Mode
Oscillator
Startup Delay
Oscillator
Startup Timer
PLL Lock Time
Total Delay
FRC, FRCDIV16, FRCDIVN
TOSCD
—
—
TOSCD
FRCPLL
TOSCD
—
TLOCK
TOSCD + TLOCK
XT
TOSCD
TOST
—
TOSCD + TOST
HS
TOSCD
TOST
—
TOSCD + TOST
EC
—
—
—
—
XTPLL
TOSCD
TOST
TLOCK
TOSCD + TOST +
TLOCK
HSPLL
TOSCD
TOST
TLOCK
TOSCD + TOST +
TLOCK
ECPLL
—
—
TLOCK
TLOCK
SOSC
TOSCD
TOST
—
TOSCD + TOST
LPRC
TOSCD
—
—
TOSCD
Note 1: TOSCD = Oscillator Start-up Delay (1.1 μs max for FRC, 70 μs max for LPRC). Crystal Oscillator start-up
times vary with crystal characteristics, load capacitance, etc.
2: TOST = Oscillator Start-up Timer Delay (1024 oscillator clock period). For example, TOST = 102.4 μs for a
10 MHz crystal and TOST = 32 ms for a 32 kHz crystal.
3: TLOCK = PLL lock time (1.5 ms nominal), if PLL is enabled.
DS70291E-page 86
© 2011 Microchip Technology Inc.