70291E Datasheet, PDF (224/436 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 17-1: QEIxCON: QEIx CONTROL REGISTER (x = 1 or 2)
R/W-0
U-0
R/W-0
R-0
R/W-0
R/W-0
CNTERR
—
QEISIDL
INDEX
UPDN
bit 15
R/W-0
QEIM<2:0>
R/W-0
bit 8
R/W-0
SWPAB
bit 7
R/W-0
PCDOUT
R/W-0
TQGATE
R/W-0
R/W-0
TQCKPS<1:0>
R/W-0
POSRES
R/W-0
TQCS
R/W-0
UPDN_SRC
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-8
bit 7
bit 6
CNTERR: Count Error Status Flag bit⁽¹⁾
1 = Position count error has occurred
0 = No position count error has occurred
Unimplemented: Read as ‘0’
QEISIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
INDEX: Index Pin State Status bit (Read-Only)
1 = Index pin is High
0 = Index pin is Low
UPDN: Position Counter Direction Status bit⁽²⁾
1 = Position Counter Direction is positive (+)
0 = Position Counter Direction is negative (-)
QEIM<2:0>: Quadrature Encoder Interface Mode Select bits
111 = Quadrature Encoder Interface enabled (x4 mode) with position counter reset by match
(MAXxCNT)
110 = Quadrature Encoder Interface enabled (x4 mode) with Index Pulse reset of position counter
101 = Quadrature Encoder Interface enabled (x2 mode) with position counter reset by match
(MAXxCNT)
100 = Quadrature Encoder Interface enabled (x2 mode) with Index Pulse reset of position counter
011 = Unused (Module disabled)
010 = Unused (Module disabled)
001 = Starts 16-bit Timer
000 = Quadrature Encoder Interface/Timer off
SWPAB: Phase A and Phase B Input Swap Select bit
1 = Phase A and Phase B inputs swapped
0 = Phase A and Phase B inputs not swapped
PCDOUT: Position Counter Direction State Output Enable bit
1 = Position Counter Direction Status Output Enable (QEI logic controls state of I/O pin)
0 = Position Counter Direction Status Output Disabled (Normal I/O pin operation)
Note 1:
2:
3:
4:
5:
CNTERR flag only applies when QEIM<2:0> = ‘110’ or ‘100’.
Read-only bit when QEIM<2:0> = ‘1XX’. Read/write bit when QEIM<2:0> = ‘001’.
Prescaler utilized for 16-bit Timer mode only.
This bit applies only when QEIM<2:0> = 100 or 110.
When configured for QEI mode, this control bit is a ‘don’t care’.
DS70291E-page 224
© 2011 Microchip Technology Inc.