70291E Datasheet, PDF (381/436 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
TABLE 31-40: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
-40°C ≤ TA ≤ +125°C for Extended
Param
No.
Symbol
Characteristic
Min⁽¹⁾
Max Units
Conditions
IM10 TLO:SCL Clock Low Time 100 kHz mode TCY/2 (BRG + 1) —
μs
—
400 kHz mode TCY/2 (BRG + 1) —
μs
—
1 MHz mode⁽²⁾ TCY/2 (BRG + 1)
—
μs
—
IM11 THI:SCL Clock High Time 100 kHz mode TCY/2 (BRG + 1) —
μs
—
400 kHz mode TCY/2 (BRG + 1) —
μs
—
1 MHz mode⁽²⁾ TCY/2 (BRG + 1)
—
μs
—
IM20
TF:SCL
SDAx and SCLx 100 kHz mode
Fall Time
400 kHz mode
1 MHz mode⁽²⁾
—
20 + 0.1 CB
—
300
ns CB is specified to be
300
ns ^{from 10 to 400 pF}
100
ns
IM21
TR:SCL
SDAx and SCLx 100 kHz mode
Rise Time
400 kHz mode
1 MHz mode⁽²⁾
—
20 + 0.1 CB
—
1000
300
300
ns CB is specified to be
ns ^{from 10 to 400 pF}
ns
IM25 TSU:DAT Data Input
100 kHz mode
250
—
ns
—
Setup Time
400 kHz mode
100
—
ns
1 MHz mode⁽²⁾
40
—
ns
IM26 THD:DAT Data Input
100 kHz mode
0
—
μs
—
Hold Time
400 kHz mode
0
0.9
μs
1 MHz mode⁽²⁾
0.2
—
μs
IM30 TSU:STA Start Condition 100 kHz mode TCY/2 (BRG + 1) —
Setup Time
400 kHz mode TCY/2 (BRG + 1) —
1 MHz mode⁽²⁾ TCY/2 (BRG + 1)
—
μs Only relevant for
μs ^{Repeated Start}
μs ^condition
IM31 THD:STA Start Condition 100 kHz mode TCY/2 (BRG + 1) —
Hold Time
400 kHz mode TCY/2 (BRG + 1) —
1 MHz mode⁽²⁾ TCY/2 (BRG + 1)
—
μs After this period the
μs ^{first clock pulse is}
μs ^generated
IM33 TSU:STO Stop Condition 100 kHz mode TCY/2 (BRG + 1) —
μs
—
Setup Time
400 kHz mode TCY/2 (BRG + 1) —
μs
1 MHz mode⁽²⁾ TCY/2 (BRG + 1)
—
μs
IM34 THD:STO Stop Condition 100 kHz mode TCY/2 (BRG + 1) —
ns
—
Hold Time
400 kHz mode TCY/2 (BRG + 1) —
ns
1 MHz mode⁽²⁾ TCY/2 (BRG + 1)
—
ns
IM40 TAA:SCL Output Valid
100 kHz mode
—
3500
ns
—
From Clock
400 kHz mode
—
1000
ns
—
1 MHz mode⁽²⁾
—
400
ns
—
IM45 TBF:SDA Bus Free Time 100 kHz mode
4.7
400 kHz mode
1.3
1 MHz mode⁽²⁾
0.5
—
μs Time the bus must be
—
μs ^{free before a new}
—
μs ^{transmission can start}
IM50 CB
Bus Capacitive Loading
—
400
pF
—
IM51 TPGD Pulse Gobbler Delay
65
390
ns
See Note 3
Note 1: BRG is the value of the I²C Baud Rate Generator. Refer to Section 19. “Inter-Integrated Circuit™
(I²C™)” (DS70195) in the “dsPIC33F/PIC24H Family Reference Manual”. Please see the Microchip web
site for the latest dsPIC33F/PIC24H Family Reference Manual sections.
2: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
3: Typical value for this parameter is 130 ns.
© 2011 Microchip Technology Inc.
DS70291E-page 381