70291E Datasheet, PDF(167/436 Page) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

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70291E Datasheet, PDF (167/436 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04

11.6.2.2 Output Mapping

In contrast to inputs, the outputs of the peripheral pin

select options are mapped on the basis of the pin. In

this case, a control register associated with a particular

pin dictates the peripheral output to be mapped. The

RPORx registers are used to control output mapping.

Like the RPINRx registers, each register contains sets

of 5-bit fields, with each set associated with one RPn

pin (see Register 11-21 through Register 11-33). The

value of the bit field corresponds to one of the

peripherals, and that peripheralâs output is mapped to

the pin (see Table 11-2 and Figure 11-3).

The list of peripherals for output mapping also includes

a null value of â00000â because of the mapping

technique. This permits any given pin to remain

unconnected from the output of any of the pin

selectable peripherals.

FIGURE 11-3:

MULTIPLEXING OF

REMAPPABLE OUTPUT

FOR RPn

RPnR<4:0>

default

0

U1TX Output enable 3

U1RTS Output enable 4

Output Enable

UPDN2 Output enable 27

default

0

U1TX Output 3

U1RTS Output 4

RPn

Output Data

UPDN2 Output 27

TABLE 11-2: OUTPUT SELECTION FOR REMAPPABLE PIN (RPn)

Function

RPnR<4:0>

Output Name

NULL

C1OUT

C2OUT

U1TX

00000

00001

00010

00011

RPn tied to default port pin

RPn tied to Comparator1 Output

RPn tied to Comparator2 Output

RPn tied to UART1 Transmit

U1RTS

U2TX

00100

00101

RPn tied to UART1 Ready To Send

RPn tied to UART2 Transmit

U2RTS

SDO1

SCK1

SS1

SDO2

SCK2

SS2

C1TX

OC1

OC2

OC3

OC4

UPDN1

UPDN2

00110

00111

01000

01001

01010

01011

01100

10000

10010

10011

10100

10101

11010

11011

RPn tied to UART2 Ready To Send

RPn tied to SPI1 Data Output

RPn tied to SPI1 Clock Output

RPn tied to SPI1 Slave Select Output

RPn tied to SPI2 Data Output

RPn tied to SPI2 Clock Output

RPn tied to SPI2 Slave Select Output

RPn tied to ECAN1 Transmit

RPn tied to Output Compare 1

RPn tied to Output Compare 2

RPn tied to Output Compare 3

RPn tied to Output Compare 4

RPn tied to QEI1 direction (UPDN) status

RPn tied to QEI2 direction (UPDN) status

Â© 2011 Microchip Technology Inc.

DS70291E-page 167

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