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70291E Datasheet, PDF (391/436 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
TABLE 31-47: ADC CONVERSION (10-BIT MODE) TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
-40°C ≤ TA ≤ +125°C for Extended
Param
No.
Symbol
Characteristic
Min. Typ(1) Max. Units
Conditions
Clock Parameters
AD50 TAD
ADC Clock Period
76
—
—
ns
—
AD51 tRC
ADC Internal RC Oscillator Period —
250
—
ns
—
Conversion Rate
AD55 tCONV Conversion Time
— 12 TAD —
—
—
AD56 FCNV Throughput Rate
—
—
1.1 Msps
—
AD57 TSAMP Sample Time
2 TAD
—
—
—
—
Timing Parameters
AD60 tPCS
Conversion Start from Sample
Trigger(1)
2 TAD
—
3 TAD
— Auto-Convert Trigger
not selected
AD61 tPSS Sample Start from Setting
2 TAD
—
3 TAD
—
—
Sample (SAMP) bit(1)
AD62 tCSS Conversion Completion to
— 0.5 TAD —
—
—
Sample Start (ASAM = 1)(1)
AD63 tDPU Time to Stabilize Analog Stage
—
—
20
μs
—
from ADC Off to ADC On(1)
Note 1: These parameters are characterized but not tested in manufacturing.
2: Because the sample caps will eventually lose charge, clock rates below 10 kHz may affect linearity
performance, especially at elevated temperatures.
3: The tDPU is the time required for the ADC module to stabilize at the appropriate level when the module is
turned on (AD1CON1<ADON>=‘1’). During this time, the ADC result is indeterminate.
TABLE 31-48: AUDIO DAC MODULE SPECIFICATIONS
AC/DC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
-40°C ≤ TA ≤ +125°C for Extended
Param
No.
Symbol
Characteristic
Min. Typ Max. Units
Conditions
Clock Parameters
DA01 VOD+
Positive Output Differential
Voltage
1 1.15 2
V VOD+ = VDACH - VDACL
See Note 1,2
DA02 VOD-
Negative Output Differential
Voltage
-2 -1.15 -1
V VOD- = VDACL - VDACH
See Note 1,2
DA03 VRES
Resolution
— 16 — bits
—
DA04 GERR
Gain Error
— 3.1 — %
—
DA08 FDAC
Clock frequency
— — 25.6 MHz
—
DA09 FSAMP Sample Rate
0
— 100 kHz
—
DA10 FINPUT Input data frequency
0
— 45 kHz Sampling frequency = 100 kHz
DA11 TINIT
Initialization period
1024 — — Clks Time before first sample
DA12 SNR
Signal-to-Noise Ratio
— 61
dB Sampling frequency = 96 kHz
Note 1: Measured VDACH and VDACL output with respect to VSS, with 15 µA load and FORM bit (DACXCON<8>) = 0.
2: This parameter is tested at -40°C ≤ TA ≤ +85°C only.
© 2011 Microchip Technology Inc.
DS70291E-page 391