70291E Datasheet, PDF (279/436 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 22-2: AD1CON2: ADC1 CONTROL REGISTER 2
R/W-0
R/W-0
R/W-0
U-0
U-0
VCFG<2:0>
—
—
bit 15
R/W-0
CSCNA
R/W-0
R/W-0
CHPS<1:0>
bit 8
R-0
BUFS
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
SMPI<3:0>
BUFM
ALTS
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12-11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
VCFG<2:0>: Converter Voltage Reference Configuration bits
ADREF+
000
AVDD
001 External VREF+
010
AVDD
011 External VREF+
1xx
AVDD
ADREF-
AVSS
AVSS
External VREF-
External VREF-
Avss
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for CH0+ during Sample A bit
1 = Scan inputs
0 = Do not scan inputs
CHPS<1:0>: Selects Channels Utilized bits
When AD12B = 1, CHPS<1:0> is: U-0, Unimplemented, Read as ‘0’
1x =Converts CH0, CH1, CH2 and CH3
01 =Converts CH0 and CH1
00 =Converts CH0
BUFS: Buffer Fill Status bit (only valid when BUFM = 1)
1 = ADC is currently filling buffer 0x8-0xF, user should access data in 0x0-0x7
0 = ADC is currently filling buffer 0x0-0x7, user should access data in 0x8-0xF
Unimplemented: Read as ‘0’
SMPI<3:0>: Selects Increment Rate for DMA Addresses bits or number of sample/conversion
operations per interrupt
1111 =Increments the DMA address or generates interrupt after completion of every 16th sample/
conversion operation
1110 =Increments the DMA address or generates interrupt after completion of every 15th sample/
conversion operation
•
•
•
0001 =Increments the DMA address after completion of every 2nd sample/conversion operation
0000 =Increments the DMA address after completion of every sample/conversion operation
BUFM: Buffer Fill Mode Select bit
1 = Starts buffer filling at address 0x0 on first interrupt and 0x8 on next interrupt
0 = Always starts filling buffer at address 0x0
ALTS: Alternate Input Sample Mode Select bit
1 = Uses channel input selects for Sample A on first sample and Sample B on next sample
0 = Always uses channel input selects for Sample A
© 2011 Microchip Technology Inc.
DS70291E-page 279