PIC16LF1508 Datasheet, PDF (84/384 Pages) Microchip Technology – 20-Pin Flash, 8-Bit Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1508/9
7.6.7 PIR3 REGISTER
The PIR3 register contains the interrupt flag bits, as
shown in Register 7-7.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 7-7: PIR3: PERIPHERAL INTERRUPT REQUEST REGISTER 3
U-0
—
bit 7
U-0
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
—
CLC4IF
CLC3IF
CLC2IF
R/W-0/0
CLC1IF
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
CLC4IF: Configurable Logic Block 4 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CLC3IF: Configurable Logic Block 3 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CLC2IF: Configurable Logic Block 2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CLC1IF: Configurable Logic Block 1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
DS41609A-page 84
Preliminary
 2011 Microchip Technology Inc.