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PIC16LF1508 Datasheet, PDF (104/384 Pages) Microchip Technology – 20-Pin Flash, 8-Bit Microcontrollers with nanoWatt XLP Technology
PIC16(L)F1508/9
EXAMPLE 10-3: WRITING TO FLASH PROGRAM MEMORY
; This write routine assumes the following:
; 1. 64 bytes of data are loaded, starting at the address in DATA_ADDR
; 2. Each word of data to be written is made up of two adjacent bytes in DATA_ADDR,
; stored in little endian format
; 3. A valid starting address (the least significant bits = 00000) is loaded in ADDRH:ADDRL
; 4. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
;
BCF
INTCON,GIE
; Disable ints so required sequences will execute properly
BANKSEL PMADRH
; Bank 3
MOVF
ADDRH,W
; Load initial address
MOVWF
PMADRH
;
MOVF
ADDRL,W
;
MOVWF
PMADRL
;
MOVLW
LOW DATA_ADDR ; Load initial data address
MOVWF
FSR0L
;
MOVLW
HIGH DATA_ADDR ; Load initial data address
MOVWF
FSR0H
;
BCF
PMCON1,CFGS ; Not configuration space
BSF
PMCON1,WREN ; Enable writes
BSF
PMCON1,LWLO ; Only Load Write Latches
LOOP
MOVIW
FSR0++
; Load first data byte into lower
MOVWF
PMDATL
;
MOVIW
FSR0++
; Load second data byte into upper
MOVWF
PMDATH
;
MOVF
XORLW
ANDLW
BTFSC
GOTO
PMADRL,W
0x1F
0x1F
STATUS,Z
START_WRITE
; Check if lower bits of address are '00000'
; Check if we're on the last of 32 addresses
;
; Exit if last of 32 words,
;
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
55h
PMCON2
0AAh
PMCON2
PMCON1,WR
; Start of required write sequence:
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; NOP instructions are forced as processor
; loads program memory write latches
;
INCF
GOTO
PMADRL,F
LOOP
; Still loading latches Increment address
; Write next latches
START_WRITE
BCF
PMCON1,LWLO
; No more loading latches - Actually start Flash program
; memory write
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BCF
BSF
55h
PMCON2
0AAh
PMCON2
PMCON1,WR
PMCON1,WREN
INTCON,GIE
; Start of required write sequence:
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; NOP instructions are forced as processor writes
; all the program memory write latches simultaneously
; to program memory.
; After NOPs, the processor
; stalls until the self-write process in complete
; after write processor continues with 3rd instruction
; Disable writes
; Enable interrupts
DS41609A-page 104
Preliminary
 2011 Microchip Technology Inc.