PIC16LF1508 Datasheet, PDF (30/384 Pages) Microchip Technology – 20-Pin Flash, 8-Bit Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1508/9
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 2
10Ch LATA
10Dh LATB
10Eh LATC
10Fh —
110h —
111h CM1CON0
112h CM1CON1
113h CM2CON0
114h CM2CON1
115h CMOUT
116h BORCON
117h FVRCON
118h DACCON0
119h DACCON1
—
—
LATB7
LATB6
LATC7
LATC6
Unimplemented
Unimplemented
C1ON
C1OUT
C1INTP C1INTN
C2ON
C2OUT
C2INTP C2INTN
—
—
SBOREN BORFS
FVREN FVRRDY
DACEN
—
—
LATA5
LATB5
LATC5
LATA4
LATB4
LATC4
C1OE
C1POL
C1PCH<1:0>
C2OE
C2POL
C2PCH<1:0>
—
—
—
—
TSEN
TSRNG
DACOE1 DACOE2
—
—
—
LATC3
LATA2
—
LATC2
LATA1
—
LATC1
LATA0
—
LATC0
—
C1SP
C1HYS
C1SYNC
—
C1NCH<2:0>
—
C2SP
C2HYS
C2SYNC
—
C2NCH<2:0>
—
—
MC2OUT
MC1OUT
—
—
—
BORRDY
CDAFVR<1:0>
ADFVR<1:0>
—
DACPSS
—
—
DACR<4:0>
--xx -xxx --uu -uuu
xxxx ---- uuuu ----
xxxx xxxx uuuu uuuu
—
—
—
—
0000 -100 0000 -100
0000 -000 0000 -000
0000 -100 0000 -100
0000 -000 0000 -000
---- --00 ---- --00
10-- ---q uu-- ---u
0q00 0000 0q00 0000
0-00 -0-- 0-00 -0--
---0 0000 ---0 0000
11Ah
to —
11Ch
Unimplemented
—
—
11Dh APFCON
—
—
—
SSSEL T1GSEL
—
CLC1SEL NCO1SEL ---0 0-00 ---0 0-00
11Eh —
Unimplemented
—
—
11Fh —
Unimplemented
—
—
Bank 3
18Ch ANSELA
—
—
—
ANSA4
—
ANSA2
ANSA1
ANSA0 ---1 -111 ---1 -111
18Dh ANSELB
—
—
ANSB5 ANSB4
—
—
—
—
--11 ---- --11 ----
18Eh ANSELC
ANSC7 ANSC6
—
—
ANSC3 ANSC2
ANSC1
ANSC0 11-- 1111 11-- 1111
18Fh —
Unimplemented
—
—
190h —
Unimplemented
—
—
191h PMADRL
Flash Program Memory Address Register Low Byte
0000 0000 0000 0000
192h PMADRH
—
Flash Program Memory Address Register High Byte
-000 0000 -000 0000
193h PMDATL
Flash Program Memory Read Data Register Low Byte
xxxx xxxx uuuu uuuu
194h
195h
PMDATH
PMCON1
—
—⁽²⁾
—
CFGS
Flash Program Memory Read Data Register High Byte
LWLO
FREE WRERR WREN
WR
--xx xxxx --uu uuuu
RD
0000 x000 0000 q000
196h PMCON2
Flash Program Memory Control Register 2
0000 0000 0000 0000
197h
VREGCON⁽¹⁾
—
—
—
—
—
—
VREGPM Reserved ---- --01 ---- --01
198h —
Unimplemented
—
—
199h RCREG
USART Receive Data Register
0000 0000 0000 0000
19Ah TXREG
USART Transmit Data Register
0000 0000 0000 0000
19Bh SPBRGL
Baud Rate Generator Data Register Low
0000 0000 0000 0000
19Ch SPBRGH
Baud Rate Generator Data Register High
0000 0000 0000 0000
19Dh RCSTA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D 0000 000x 0000 000x
19Eh TXSTA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
0000 0010 0000 0010
19Fh BAUDCON ABDOVF RCIDL
—
SCKP
BRG16
—
WUE
ABDEN 01-0 0-00 01-0 0-00
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved. Shaded locations are unimplemented, read as ‘0’.
Note 1: PIC16F1508/9 only.
2: Unimplemented, read as ‘1’.
DS41609A-page 30
Preliminary
 2011 Microchip Technology Inc.