PIC16LF1508 Datasheet, PDF (261/384 Pages) Microchip Technology – 20-Pin Flash, 8-Bit Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1508/9
FIGURE 22-12: SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
RX/DT
pin
TX/CK pin
(SCKP = 0)
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
TX/CK pin
(SCKP = 1)
Write to
bit SREN
SREN bit
CREN bit ^{‘0’}
‘0’
RCIF bit
(Interrupt)
Read
RCREG
Note:
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
TABLE 22-8: SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER
RECEPTION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
BAUDCON ABDOVF RCIDL
—
SCKP BRG16
—
WUE ABDEN
248
INTCON
GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
78
PIE1
TMR1GIE ADIE
RCIE
TXIE SSP1IE
—
TMR2IE TMR1IE
79
PIR1
TMR1GIF ADIF
RCIF
TXIF SSP1IF
—
TMR2IF TMR1IF
82
RCREG
EUSART Receive Data Register
242*
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
247
SPBRGL
BRG<7:0>
249*
SPBRGH
BRG<15:8>
249*
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 122
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
246
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for synchronous master reception.
* Page provides register information.
 2011 Microchip Technology Inc.
Preliminary
DS41609A-page 261