PIC16LF1508 Datasheet, PDF (120/384 Pages) Microchip Technology – 20-Pin Flash, 8-Bit Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1508/9
REGISTER 11-11: WPUB: WEAK PULL-UP PORTB REGISTER
R/W-1/1
R/W-1/1
R/W-1/1
R/W-1/1
U-0
U-0
WPUB7
WPUB6
WPUB5
WPUB4
—
—
bit 7
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3-0
WPUB<7:4>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is configured as an output.
TABLE 11-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELB
—
—
ANSB5 ANSB4
—
—
—
—
119
APFCON
—
—
—
SSSEL T1GSEL
—
CLC1SEL NCO1SEL 112
LATB
LATB7
LATB6
LATB5
LATB4
—
—
—
—
119
OPTION_REG WPUEN INTEDG TMR0CS TMR0SE
PSA
PS<2:0>
165
PORTB
RB7
RB6
RB5
RB4
—
—
—
—
118
TRISB
TRISB7 TRISB6 TRISB5 TRISB4
—
—
—
—
118
WPUB
WPUB7 WPUB6 WPUB5 WPUB4
—
—
—
—
120
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
Note 1: Unimplemented, read as ‘1’.
TABLE 11-7: SUMMARY OF CONFIGURATION WORD WITH PORTB
Name Bits Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3
Bit 10/2
Bit 9/1
Bit 8/0
13:8
—
CONFIG1
7:0
CP
—
MCLRE
FCMEN
PWRTE
IESO CLKOUTEN
WDTE<1:0>
BOREN<1:0>
—
FOSC<2:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by PORTB.
Register
on Page
44
DS41609A-page 120
Preliminary
 2011 Microchip Technology Inc.