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PIC18F25K20T-ISO Datasheet, PDF (62/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
PIC18F2XK20/4XK20
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
IPR2
PIR2
PIE2
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1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu(1)
uuuu uuuu
IPR1
PIR1
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1111 1111
-111 1111
0000 0000
-000 0000
1111 1111
-111 1111
0000 0000
-000 0000
uuuu uuuu
-uuu uuuu
uuuu uuuu(1)
-uuu uuuu(1)
PIE1
OSCTUNE
TRISE
TRISD
TRISC
TRISB
TRISA(5)
LATE
LATD
LATC
LATB
LATA(5)
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0000 0000
-000 0000
0000 0000
---- -111
1111 1111
1111 1111
1111 1111
1111 1111(5)
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx(5)
0000 0000
-000 0000
0000 0000
---- -111
1111 1111
1111 1111
1111 1111
1111 1111(5)
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu(5)
uuuu uuuu
-uuu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu(5)
---- -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu(5)
PORTE
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---- x000
---- x---
---- u000
---- u---
---- uuuu
---- u---
PORTD
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xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTC
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xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTB
PORTA(5)
ANSELH(6)
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xxx0 0000
xx0x 0000(5)
---1 1111
uuu0 0000
uu0u 0000(5)
---1 1111
uuuu uuuu
uuuu uuuu(5)
---u uuuu
ANSEL
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1111 1111
1111 1111
uuuu uuuu
IOCB
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0000 ----
0000 ----
uuuu ----
WPUB
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1111 1111
1111 1111
uuuu uuuu
CM1CON0
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0000 0000
0000 0000
uuuu uuuu
CM2CON0
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0000 0000
0000 0000
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
DS41303G-page 62
 2010 Microchip Technology Inc.