PIC18F25K20T-ISO Datasheet, PDF (295/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F2XK20/4XK20
22.2 HLVD Setup
The following steps are needed to set up the HLVD
module:
1. Write the value to the HLVDL<3:0> bits that
selects the desired HLVD trip point.
2. Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1) or low voltage (VDIRMAG = 0).
3. Enable the HLVD module by setting the
HLVDEN bit.
4. Clear the HLVD interrupt flag bit of the PIR2
register, which may have been set from a
previous interrupt.
5. Enable the HLVD interrupt if interrupts are
desired by setting the HLVDIE bit of the PIE2
register, and the GIE and PEIE bits of the INT-
CON register. An interrupt will not be generated
until the IRVST bit is set.
22.3 Current Consumption
When the module is enabled, the HLVD comparator
and voltage divider are enabled and will consume static
current. The total current consumption, when enabled,
is specified in electrical specification parameter D024B.
Depending on the application, the HLVD module does
not need to be operating constantly. To decrease the
current requirements, the HLVD circuitry may only
need to be enabled for short periods where the voltage
is checked. After doing the check, the HLVD module
may be disabled.
22.4 HLVD Start-up Time
The internal reference voltage of the HLVD module,
specified in electrical specification parameter D420,
may be used by other internal circuitry, such as the
Programmable Brown-out Reset. If the HLVD or other
circuits using the voltage reference are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low or high-voltage condition can be reliably
detected. This start-up time, TIRVST, is an interval that
is independent of device clock speed. It is specified in
electrical specification parameter 36.
The HLVD interrupt flag is not enabled until TIRVST has
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval. Refer to Figure 22-2
or Figure 22-3.
FIGURE 22-2:
LOW-VOLTAGE DETECT OPERATION (VDIRMAG = 0)
CASE 1:
HLVDIF may not be set
VDD
HLVDIF
VHLVD
Enable HLVD
IRVST
TIVRST
Internal Reference is stable
HLVDIF cleared by software
CASE 2:
VDD
HLVDIF
Enable HLVD
IRVST
TIVRST
Internal Reference is stable
VHLVD
HLVDIF cleared by software
HLVDIF cleared by software,
HLVDIF remains set since HLVD condition still exists
 2010 Microchip Technology Inc.
DS41303G-page 295