PIC18F25K20T-ISO Datasheet, PDF (280/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F2XK20/4XK20
FIGURE 20-2: COMPARATOR C1 SIMPLIFIED BLOCK DIAGRAM
C1CH<1:0>
2
C12IN0-
C12IN1-
C12IN2-
C12IN3-
0
1
MUX
2
3
C1R
FVR
CVREF
C1IN+
0
MUX
1
0
MUX
1
C1VREF
DQ
Q1 _EN
C1ON⁽¹⁾
DQ
Q3*RD_CM1CON0 _EN
CL
Reset
C1VIN- _-
C1VIN+
C1
+
C1SP
C1POL
C1OUT
To
Data Bus
RD_CM1CON0
Set C1IF
To PWM Logic
C1OE
C1OUT pin⁽²⁾
C1RSEL
Note 1:
2:
3:
4:
When C1ON = 0, the C1 comparator will produce a ‘0’ output to the XOR Gate.
Output shown for reference only. See I/O port pin block diagram for more detail.
Q1 and Q3 are phases of the four-phase system clock (FOSC).
Q1 is held high during Sleep mode.
FIGURE 20-3:
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
DQ
Q1 _EN
C2CH<1:0>
2
C12IN0-
C12IN1-
C12IN2-
C12IN3-
0
1
MUX
2
3
C2ON⁽¹⁾
C2VIN-
C2VIN+ ^C2
C2SP
DQ
Q3*RD_CM2CON0 _EN
CL
NRESET
C2OUT
C2R
C2POL
To
Data Bus
RD_CM2CON0
Set C2IF
To PWM Logic
C2OE
C2OUT pin⁽²⁾
FVR
CVREF
C2IN+
0
MUX
1
0
MUX
1
C2VREF
Note 1:
C2RSEL
2:
3:
4:
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Output shown for reference only. See I/O port pin block diagram for more detail.
Q1 and Q3 are phases of the four-phase system clock (FOSC).
Q1 is held high during Sleep mode.
DS41303G-page 280
 2010 Microchip Technology Inc.