PIC16LF720_11 Datasheet, PDF (47/244 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

6.0 I/O PORTS
There are as many as eighteen general purpose I/O
pins available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
6.1 PORTA and the TRISA Registers
PORTA is a 8-bit wide, bidirectional port. The
corresponding data direction register is TRISA
(Register 6-2). Setting a TRISA bit (= 1) will make the
corresponding PORTA pin an input (i.e., disable the
output driver). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., enables
output driver and puts the contents of the output latch
on the selected pin). Example 6-1 shows how to
initialize PORTA.
Reading the PORTA register (Register 6-1) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch.
The TRISA register (Register 6-2) controls the PORTA
pin output drivers, even when they are being used as
analog inputs. The user should ensure the bits in the
TRISA register are maintained set when using them as
analog inputs. I/O pins configured as analog input always
read ‘0’.
Note:
The ANSELA register must be initialized
to configure an analog channel as a digital
input. Pins configured as analog inputs
will read ‘0’.
EXAMPLE 6-1:
BANKSEL PORTA
CLRF PORTA
BANKSEL ANSELA
CLRF ANSELA
BANKSEL TRISA
MOVLW 0Ch
MOVWF TRISA
INITIALIZING PORTA
;
;Init PORTA
;
;digital I/O
;
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
PIC16(L)F720/721
6.1.1 WEAK PULL-UPS
Each of the PORTA pins has an individually
configurable internal weak pull-up. Control bits
WPUA<5:0> enable or disable each pull-up (see
Register 6-5). Each weak pull-up is automatically
turned off when the port pin is configured as an output.
All pull-ups are disabled on a Power-on Reset by the
RABPU bit of the OPTION register.
6.1.2 INTERRUPT-ON-CHANGE
All of the PORTA pins are individually configurable as
an interrupt-on-change pin. Control bits IOCA<5:0>
enable or disable the interrupt function for each pin
(see Register 6-6). The interrupt-on-change feature is
disabled on a Power-on Reset.
For enable interrupt-on-change pins, the present value
is compared with the old value latched on the last read
of PORTA to determine which bits have changed or
mismatched the old value. The ‘mismatch’ outputs of
the last read are OR’d together to set the PORTA
Change Interrupt Flag bit (RABIF) in the INTCON
register. This interrupt can wake the device from Sleep.
The user, in the Interrupt Service Routine, clears the
interrupt by:
1. Any read or write of PORTA. This will end the
mismatch condition.
2. Clear the flag bit RABIF.
A mismatch condition will continue to set flag bit RABIF.
Reading or writing PORTA will end the mismatch
condition and allow flag bit RABIF to be cleared. The
latch holding the last read value is not affected by a
MCLR or Brown-out Reset. After these Resets, the
RABIF flag will continue to be set if a mismatch is
present.
Note:
When a pin change occurs at the same
time as a read operation on PORTA, the
RABIF flag will always be set. If multiple
PORTA pins are configured for the inter-
rupt-on-change, the user may not be able
to identify which pin changed state.
 2011 Microchip Technology Inc.
Preliminary
DS41430B-page 47