PIC16LF720_11 Datasheet, PDF (238/244 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F720/721
SSPCON (Sync Serial Port Control) Register... 146, 158
SSPSTAT (Sync Serial Port Status) Register ... 147, 159
STATUS ...................................................................... 21
T1CON (Timer1 Control)........................................... 104
T1GCON (Timer1 Gate Control) ............................... 105
T2CON ...................................................................... 108
TRISA (Tri-State PORTA) ........................................... 48
TRISB (Tri-State PORTB) ........................................... 57
TRISC (Tri-State PORTC) .......................................... 63
TXSTA (Transmit Status and Control) ...................... 127
WPUB (Weak Pull-up PORTB) ................................... 57
Reset................................................................................... 27
Resets
Associated Registers .................................................. 36
Revision History ................................................................ 233
S
S (Start) bit ........................................................................ 159
SMP bit...................................................................... 147, 159
Software Simulator (MPLAB SIM)..................................... 185
SPBRG.............................................................................. 129
SPBRG Register ................................................................. 18
Special Event Trigger.......................................................... 80
Special Function Registers ................................................. 14
SPI Mode .......................................................................... 145
Associated Registers ................................................ 148
Typical Master/Slave Connection ............................. 139
SSP ................................................................................... 139
I²C Mode ................................................................... 149
Acknowledge..................................................... 150
Addressing ........................................................ 151
Clock Stretching................................................ 156
Clock Synchronization ...................................... 157
Firmware Master Mode ..................................... 156
Hardware Setup ................................................ 149
Multi-Master Mode ............................................ 156
Reception.......................................................... 152
Sleep Operation ................................................ 157
Start/Stop Conditions ........................................ 150
Transmission..................................................... 154
Master Mode ............................................................. 141
SPI Mode .................................................................. 139
Slave Mode ....................................................... 143
Typical SPI Master/Slave Connection....................... 139
SSPADD Register ............................................................... 18
SSPBUF Register ............................................................... 17
SSPCON Register............................................... 17, 146, 158
SSPEN bit ................................................................. 146, 158
SSPM bits ................................................................. 146, 158
SSPOV bit ................................................................. 146, 158
SSPSTAT Register ............................................. 18, 147, 159
STATUS Register................................................................ 21
Synchronous Serial Port Enable bit (SSPEN)........... 146, 158
Synchronous Serial Port Mode Select bits (SSPM) .. 146, 158
T
T1CON Register.......................................................... 17, 104
TMR1ON Bit.............................................................. 105
T1GCON Register............................................................. 105
T2CON Register.................................................. 17, 108, 148
Temperature Indicator Module ............................................ 89
Thermal Considerations .................................................... 194
Time-out Sequence............................................................. 32
Timer0 ................................................................................. 91
Associated Registers .................................................. 93
Interrupt....................................................................... 93
Operation .............................................................. 91, 96
Specifications ........................................................... 202
Timer1................................................................................. 95
Associated registers ................................................. 106
Asynchronous Counter Mode ..................................... 97
Reading and Writing ........................................... 97
Interrupt .................................................................... 100
Modes of Operation .................................................... 96
Module On/Off (TMR1ON Bit)................................... 105
Operation During Sleep ............................................ 100
Prescaler .................................................................... 97
Specifications ........................................................... 202
Timer1 Gate
Selecting Source ................................................ 97
TMR1H Register ......................................................... 95
TMR1L Register.......................................................... 95
Timer2
Associated registers ................................................. 108
Timers
Timer1
T1CON ............................................................. 104
T1GCON........................................................... 105
Timer2
T2CON ............................................................. 108
Timing Diagrams
A/D Conversion......................................................... 204
A/D Conversion (Sleep Mode) .................................. 205
Asynchronous Reception.......................................... 126
Asynchronous Transmission..................................... 122
Asynchronous Transmission (Back-to-Back)............ 123
Brown-out Reset (BOR)............................................ 200
Brown-out Reset Situations ........................................ 31
CLKOUT and I/O ...................................................... 199
Clock Synchronization .............................................. 157
Clock Timing ............................................................. 196
I²C Bus Data............................................................. 210
I²C Bus Start/Stop Bits ............................................. 209
I²C Reception (7-bit Address)................................... 152
I²C Slave Mode with SEN = 0 (Reception,
10-bit Address) ................................................. 153
I²C Transmission (7-bit Address).............................. 154
INT Pin Interrupt ......................................................... 38
Slave Select Synchronization ................................... 145
SPI Master Mode ...................................................... 142
SPI Master Mode (CKE = 1, SMP = 1) ..................... 207
SPI Mode (Slave Mode with CKE = 0)...................... 144
SPI Mode (Slave Mode with CKE = 1)...................... 144
SPI Slave Mode (CKE = 0) ....................................... 207
SPI Slave Mode (CKE = 1) ....................................... 208
Synchronous Reception (Master Mode, SREN) ....... 135
Synchronous Transmission ...................................... 133
Synchronous Transmission (Through TXEN) ........... 133
Time-out Sequence
Case 1 ................................................................ 32
Case 2 ................................................................ 33
Case 3 ................................................................ 33
Timer0 and Timer1 External Clock ........................... 201
Timer1 Incrementing Edge ....................................... 100
USART Synchronous Receive (Master/Slave) ......... 206
USART Synchronous Transmission
(Master/Slave) .................................................. 205
Wake-up from Interrupt............................................. 170
Timing Parameter Symbology .......................................... 195
Timing Requirements
I²C Bus Data............................................................. 211
DS41430B-page 238
Preliminary
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