PIC16LF720_11 Datasheet, PDF (161/244 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F720/721
18.0 FLASH PROGRAM MEMORY
SELF READ/SELF WRITE
CONTROL
The Flash Program Memory is readable and writable
during normal operation of the device. This memory is
not directly mapped in the register file space. Instead,
it is indirectly addressed through the Special Function
Registers. There are six SFRs used to read/write this
memory:
• PMCON1
• PMCON2
• PMDATL
• PMDATH
• PMADRL
• PMADRH
When interfacing the program memory block, the
PMDATL and PMDATH registers form a two byte word
which holds the 14-bit program data for reading, and
the PMADRL and PMADRH registers form a two byte
word which holds the 13-bit address of the program
Flash location being accessed. These devices have 2K
to 4K words of program memory with an address range
from 0000h to 0FFFh.
Devices without a full map of memory will shadow
accesses to unused blocks back to the implemented
memory.
18.1 Program Memory Read Operation
To read a program memory location, the user must
write two bytes of the address to the PMADRH and
PMADRL registers, then set control bit RD
(PMCON1<0>). Once the read control bit is set, the
Program Memory Read (PMR) controller uses the two
instruction cycles to read the data. This causes the two
instructions immediately following the ‘BSF PMCON1,
RD’ instruction to be ignored.
The data is available in the third cycle, following the set
of the RD bit, in the PMDATH and PMDATL registers.
PMDATL and PMDATH registers will hold this value
until another read is executed. See Example 18-1 and
Figure 18-1 for more information.
Note:
Interrupts must be disabled during the
time from setting PMCON1<0> (RD) to
the third instruction thereafter.
EXAMPLE 18-1: FLASH PROGRAM MEMORY READ
* This code block will read 1 word of program
* memory at the memory address:
PROG_ADDR_HI: PROG_ADDR_LO
* data will be returned in the variables;
* PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWL
PMADRL
PROG_ADDR_LO
PMADRL
PROG_ADDR_HI
PMADRH
; Select Bank 2
;
; Store LSB of address
;
; Store MSB of address
BANKSEL
BCF
BSF
NOP
NOP
BSF
PMCON1
INTCON,GIE
PMCON1,RD
INTCON,GIE
; Select Bank 3
; Disable interrupts
; Initiate read
; Ignored (Figure 18-1)
; Ignored (Figure 18-1)
; Restore interrupts
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
PMDATL
PMDATL,W
PROG_DATA_LO
PMDATH,W
PROG_DATA_HI
; Select Bank 2
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
 2011 Microchip Technology Inc.
Preliminary
DS41430B-page 161