PIC18F2X1X Datasheet, PDF (374/380 Pages) Microchip Technology – 28/40/44-PIN FLASH MICROCONTROLLERS WITH 10-BIT A/D AND NANO WATT TECHNOLOGY

PIC18F2X1X/4X1X
SLEEP .............................................................................. 292
Sleep
OSC1 and OSC2 Pin States ...................................... 31
Software Simulator (MPLAB SIM) .................................... 308
Software Simulator (MPLAB SIM30) ................................ 308
Special Event Trigger.
See Compare (ECCP Mode).
Special Event Trigger.
See Compare (ECCP Module).
Special Features of the CPU ............................................ 237
Special Function Registers ................................................ 64
Map ............................................................................ 64
SPI Mode (MSSP)
Associated Registers ............................................... 159
Bus Mode Compatibility ........................................... 159
Effects of a Reset ..................................................... 159
Enabling SPI I/O ...................................................... 155
Master Mode ............................................................ 156
Master/Slave Connection ......................................... 155
Operation ................................................................. 154
Operation in Power
Managed Modes .............................................. 159
Serial Clock .............................................................. 151
Serial Data In ........................................................... 151
Serial Data Out ........................................................ 151
Slave Mode .............................................................. 157
Slave Select ............................................................. 151
Slave Select Synchronization .................................. 157
SPI Clock ................................................................. 156
Typical Connection .................................................. 155
SS .................................................................................... 151
SSPOV ............................................................................. 181
SSPOV Status Flag .......................................................... 181
SSPSTAT Register
R/W Bit ............................................................. 164, 165
Stack Full/Underflow Resets .............................................. 56
SUBFSR ........................................................................... 303
SUBFWB .......................................................................... 292
SUBLW ............................................................................ 293
SUBULNK ........................................................................ 303
SUBWF ............................................................................ 293
SUBWFB .......................................................................... 294
SWAPF ............................................................................ 294
T
Table Pointer Operations (table) ........................................ 76
Table Reads/Table Writes .................................................. 56
TBLRD ............................................................................. 295
TBLWT ............................................................................. 296
Time-out in Various Situations (table) ................................ 45
Timer0 .............................................................................. 113
16-Bit Mode Timer Reads and Writes ...................... 114
Associated Registers ............................................... 115
Clock Source Edge Select
(T0SE Bit) ........................................................ 114
Clock Source Select (T0CS Bit) ............................... 114
Operation ................................................................. 114
Overflow Interrupt .................................................... 115
Prescaler .................................................................. 115
Prescaler. See Prescaler, Timer0.
Timer1 .............................................................................. 117
16-Bit Read/Write Mode .......................................... 119
Associated Registers ............................................... 121
Interrupt ................................................................... 120
Operation ................................................................. 118
Oscillator .......................................................... 117, 119
Oscillator Layout Considerations ............................. 120
Overflow Interrupt .................................................... 117
Resetting, Using the CCP
Special Event Trigger ...................................... 120
Special Event Trigger (ECCP) ................................. 138
TMR1H Register ...................................................... 117
TMR1L Register ....................................................... 117
Use as a Real-Time Clock ....................................... 120
Timer2 .............................................................................. 123
Associated Registers ............................................... 124
Interrupt ................................................................... 124
Operation ................................................................. 123
Output ...................................................................... 124
PR2 Register ................................................... 134, 139
TMR2 to PR2 Match Interrupt .......................... 134, 139
Timer3 .............................................................................. 125
16-Bit Read/Write Mode .......................................... 127
Associated Registers ............................................... 127
Operation ................................................................. 126
Oscillator .......................................................... 125, 127
Overflow Interrupt ............................................ 125, 127
Special Event Trigger (CCP) ................................... 127
TMR3H Register ...................................................... 125
TMR3L Register ....................................................... 125
Timing Diagrams
A/D Conversion ........................................................ 350
Acknowledge Sequence .......................................... 184
Asynchronous Reception ......................................... 203
Asynchronous Transmission .................................... 201
Asynchronous Transmission
(Back to Back) ................................................. 201
Automatic Baud Rate Calculation ............................ 199
Auto-Wake-up Bit (WUE) During
Normal Operation ............................................ 204
Auto-Wake-up Bit (WUE) During Sleep ................... 204
Baud Rate Generator with Clock Arbitration ............ 178
BRG Overflow Sequence ......................................... 199
BRG Reset Due to SDA Arbitration
During Start Condition ..................................... 187
Brown-out Reset (BOR) ........................................... 336
Bus Collision During a Repeated
Start Condition (Case 1) .................................. 188
Bus Collision During a Repeated
Start Condition (Case 2) .................................. 188
Bus Collision During a Start Condition
(SCL = 0) ......................................................... 187
Bus Collision During a Start Condition
(SDA only) ....................................................... 186
Bus Collision During a Stop Condition
(Case 1) ........................................................... 189
Bus Collision During a Stop Condition
(Case 2) ........................................................... 189
Bus Collision for Transmit and Acknowledge .......... 185
Capture/Compare/PWM (CCP) ............................... 338
DS39636A-page 372
Preliminary
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