PIC18F2X1X Datasheet, PDF (138/380 Pages) Microchip Technology – 28/40/44-PIN FLASH MICROCONTROLLERS WITH 10-BIT A/D AND NANO WATT TECHNOLOGY

PIC18F2X1X/4X1X
TABLE 14-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE TMR0IF INT0IF RBIF
49
RCON
PIR1
PIE1
IPR1
IPEN SBOREN⁽²⁾
PSPIF⁽¹⁾ ADIF
PSPIE⁽¹⁾ ADIE
PSPIP⁽¹⁾ ADIP
—
RCIF
RCIE
RCIP
RI
TXIF
TXIE
TXIP
TO
PD
POR
BOR
48
SSPIF CCP1IF TMR2IF TMR1IF 52
SSPIE CCP1IE TMR2IE TMR1IE 52
SSPIP CCP1IP TMR2IP TMR1IP 52
TRISB
PORTB Data Direction Control Register
52
TRISC
PORTC Data Direction Control Register
52
TMR2
Timer2 Register
50
PR2
Timer2 Period Register
50
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 50
CCPR1L Capture/Compare/PWM Register 1 Low Byte
51
CCPR1H Capture/Compare/PWM Register 1 High Byte
51
CCP1CON P1M1⁽¹⁾ P1M0⁽¹⁾ DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 51
CCPR2L Capture/Compare/PWM Register 2 Low Byte
51
CCPR2H Capture/Compare/PWM Register 2 High Byte
51
CCP2CON
—
—
DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 51
ECCP1AS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1⁽¹⁾ PSSBD0⁽¹⁾ 51
PWM1CON PRSEN PDC6⁽¹⁾ PDC5⁽¹⁾ PDC4⁽¹⁾ PDC3⁽¹⁾ PDC2⁽¹⁾ PDC1⁽¹⁾ PDC0⁽¹⁾
51
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: These bits are unimplemented on 28-pin devices and read as ‘0’.
2: The SBOREN bit is only available when the BOREN1:BOREN0 configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
DS39636A-page 136
Preliminary
 2004 Microchip Technology Inc.