PIC18F2X1X Datasheet, PDF (367/380 Pages) Microchip Technology – 28/40/44-PIN FLASH MICROCONTROLLERS WITH 10-BIT A/D AND NANO WATT TECHNOLOGY

PIC18F2X1X/4X1X
INDEX
A
A/D ................................................................................... 211
A/D Converter Interrupt, Configuring ....................... 215
Acquisition Requirements ........................................ 216
ADCON0 Register .................................................... 211
ADCON1 Register .................................................... 211
ADCON2 Register .................................................... 211
ADRESH Register ............................................ 211, 214
ADRESL Register .................................................... 211
Analog Port Pins, Configuring .................................. 218
Associated Registers ............................................... 220
Calculating the Minimum Required
Acquisition Time .............................................. 216
Configuring the Module ............................................ 215
Conversion Clock (TAD) ........................................... 217
Conversion Status (GO/DONE Bit) .......................... 214
Conversions ............................................................. 219
Converter Characteristics ........................................ 349
Operation in Power Managed Modes ...................... 218
Selecting and Configuring
Acquisition Time .............................................. 217
Special Event Trigger (CCP) .................................... 220
Special Event Trigger (ECCP) ................................. 138
Use of the CCP2 Trigger .......................................... 220
Absolute Maximum Ratings ............................................. 313
AC (Timing) Characteristics ............................................. 331
Load Conditions for Device
Timing Specifications ....................................... 332
Parameter Symbology ............................................. 331
Temperature and Voltage Specifications ................. 332
Timing Conditions .................................................... 332
AC Characteristics
Internal RC Accuracy ............................................... 334
Access Bank
Mapping with Indexed Literal Offset
Addressing Mode ............................................... 73
ACKSTAT ........................................................................ 181
ACKSTAT Status Flag ..................................................... 181
ADCON0 Register ............................................................ 211
GO/DONE Bit ........................................................... 214
ADCON1 Register ............................................................ 211
ADCON2 Register ............................................................ 211
ADDFSR .......................................................................... 300
ADDLW ............................................................................ 263
ADDULNK ........................................................................ 300
ADDWF ............................................................................ 263
ADDWFC ......................................................................... 264
ADRESH Register ............................................................ 211
ADRESL Register .................................................... 211, 214
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 264
ANDWF ............................................................................ 265
Assembler
MPASM Assembler .................................................. 307
Auto-Wake-up on Sync Break Character ......................... 204
B
Bank Select Register (BSR) ............................................... 59
Baud Rate Generator ....................................................... 177
BC .................................................................................... 265
BCF .................................................................................. 266
BF .................................................................................... 181
BF Status Flag ................................................................. 181
Block Diagrams
A/D ........................................................................... 214
Analog Input Model .................................................. 215
Baud Rate Generator .............................................. 177
Capture Mode Operation ......................................... 131
Comparator Analog Input Model .............................. 225
Comparator I/O Operating Modes (Diagram) .......... 222
Comparator Output .................................................. 224
Comparator Voltage Reference ............................... 228
Comparator Voltage Reference
Output Buffer Example .................................... 229
Compare Mode Operation ....................................... 132
Device Clock .............................................................. 28
Enhanced PWM ....................................................... 139
EUSART Receive .................................................... 202
EUSART Transmit ................................................... 200
External Power-on Reset Circuit
(Slow VDD Power-up) ........................................ 43
Fail-Safe Clock Monitor ........................................... 249
Generic I/O Port ......................................................... 95
High/Low-Voltage Detect with External Input .......... 232
Interrupt Logic ............................................................ 82
MSSP (I²C Master Mode) ........................................ 175
MSSP (I²C Mode) .................................................... 160
MSSP (SPI Mode) ................................................... 151
On-Chip Reset Circuit ................................................ 41
PIC18F2410/2510/2515/2610 ................................... 11
PIC18F4410/4510/4515/4610 ................................... 12
PLL (HS Mode) .......................................................... 25
PORTD and PORTE
(Parallel Slave Port) ......................................... 110
PWM Operation (Simplified) .................................... 134
Reads from Flash Program Memory ......................... 76
Single Comparator ................................................... 223
Table Read Operation ............................................... 75
Timer0 in 16-Bit Mode ............................................. 114
Timer0 in 8-Bit Mode ............................................... 114
Timer1 ..................................................................... 118
Timer1 (16-Bit Read/Write Mode) ............................ 118
Timer2 ..................................................................... 124
Timer3 ..................................................................... 126
Timer3 (16-Bit Read/Write Mode) ............................ 126
Watchdog Timer ...................................................... 246
BN .................................................................................... 266
BNC ................................................................................. 267
BNN ................................................................................. 267
BNOV .............................................................................. 268
BNZ ................................................................................. 268
BOR. See Brown-out Reset.
BOV ................................................................................. 271
BRA ................................................................................. 269
Break Character (12-Bit) Transmit
and Receive ............................................................. 205
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 44
Detecting ................................................................... 44
Disabling in Sleep Mode ............................................ 44
Software Enabled ...................................................... 44
BSF .................................................................................. 269
BTFSC ............................................................................. 270
BTFSS ............................................................................. 270
BTG ................................................................................. 271
BZ .................................................................................... 272
 2004 Microchip Technology Inc.
Preliminary
DS39636A-page 365