PIC18F2X1X Datasheet, PDF (369/380 Pages) Microchip Technology – 28/40/44-PIN FLASH MICROCONTROLLERS WITH 10-BIT A/D AND NANO WATT TECHNOLOGY

PIC18F2X1X/4X1X
Device Overview .................................................................. 7
Details on Individual Family Members ......................... 8
New Core Features ...................................................... 7
Other Special Features ................................................ 8
Device Overview (PIC18F2410/2510/2515/2610)
Features (table) ............................................................ 9
Device Overview (PIC18F4410/4510/4515/4610)
Features (table) .......................................................... 10
Device Reset Timers .......................................................... 45
Oscillator Start-up Timer (OST) ................................. 45
PLL Lock Time-out ..................................................... 45
Power-up Timer (PWRT) ........................................... 45
Direct Addressing ............................................................... 70
E
Effect on Standard PIC Instructions ........................... 71, 304
Effects of Power Managed Modes on
Various Clock Sources ............................................... 31
Electrical Characteristics .................................................. 313
Enhanced Capture/Compare/PWM (ECCP) .................... 137
Capture and Compare Modes .................................. 138
Capture Mode. See Capture (ECCP Module).
Outputs and Configuration ....................................... 138
Pin Configurations for ECCP1 ................................. 138
PWM Mode. See PWM (ECCP Module).
Standard PWM Mode ............................................... 138
Timer Resources ...................................................... 138
Enhanced PWM Mode. See PWM (ECCP Module).
Enhanced Universal Synchronous
Asynchronous Receiver Transmitter
(EUSART). See EUSART.
Equations
A/D Acquisition Time ................................................ 216
A/D Minimum Charging Time ................................... 216
Errata ................................................................................... 6
EUSART
Asynchronous Mode ................................................ 200
12-Bit Break Transmit and Receive ................. 205
Associated Registers, Receive ........................ 203
Associated Registers, Transmit ....................... 201
Auto-Wake-up on Sync Break ......................... 204
Receiver ........................................................... 202
Setting up 9-bit Mode with
Address Detect ........................................ 202
Transmitter ....................................................... 200
Baud Rate Generator
Operation in Power Managed Mode ................ 195
Baud Rate Generator (BRG) .................................... 195
Associated Registers ....................................... 195
Auto-Baud Rate Detect .................................... 198
Baud Rate Error, Calculating ........................... 195
Baud Rates, Asynchronous Modes ................. 196
High Baud Rate Select (BRGH Bit) ................. 195
Sampling .......................................................... 195
Synchronous Master Mode ...................................... 206
Associated Registers, Receive ........................ 208
Associated Registers, Transmit ....................... 207
Reception ......................................................... 208
Transmission ................................................... 206
Synchronous Slave Mode ........................................ 209
Associated Registers, Receive ........................ 210
Associated Registers, Transmit ....................... 209
Reception ......................................................... 210
Transmission ................................................... 209
Evaluation and Programming Tools ................................. 311
Extended Instruction Set ................................................. 299
ADDFSR .................................................................. 300
ADDULNK ............................................................... 300
and Using MPLAB Tools ......................................... 306
CALLW .................................................................... 301
Considerations for Use ............................................ 304
MOVSF .................................................................... 301
MOVSS .................................................................... 302
PUSHL ..................................................................... 302
SUBFSR .................................................................. 303
SUBULNK ................................................................ 303
Syntax ...................................................................... 299
External Clock Input ........................................................... 24
F
Fail-Safe Clock Monitor ........................................... 237, 249
Interrupts in Power Managed Modes ....................... 250
POR or Wake from Sleep ........................................ 250
WDT During Oscillator Failure ................................. 249
Fast Register Stack ........................................................... 56
Flash Program Memory ..................................................... 75
Associated Registers ................................................. 77
Control Registers ....................................................... 76
Reading ..................................................................... 76
TABLAT (Table Latch) Register ................................ 76
Table Reads and Table Writes .................................. 75
TBLPTR (Table Pointer) Register .............................. 76
FSCM. See Fail-Safe Clock Monitor.
G
General Call Address Support ......................................... 174
GOTO .............................................................................. 278
H
Hardware Multiplier ............................................................ 79
Introduction ................................................................ 79
Operation ................................................................... 79
Performance Comparison .......................................... 79
High/Low-Voltage Detect ................................................. 231
Applications ............................................................. 234
Associated Registers ............................................... 235
Characteristics ......................................................... 330
Current Consumption .............................................. 233
Effects of a Reset .................................................... 235
Operation ................................................................. 232
During Sleep .................................................... 235
Setup ....................................................................... 233
Start-up Time ........................................................... 233
Typical Application ................................................... 234
HLVD. See High/Low-Voltage Detect.
I
I/O Ports ............................................................................ 95
I²C Mode (MSSP)
Acknowledge Sequence Timing .............................. 184
Baud Rate Generator .............................................. 177
Bus Collision
During a Repeated Start Condition .................. 188
During a Stop Condition .................................. 189
Clock Arbitration ...................................................... 178
Clock Stretching ...................................................... 170
10-Bit Slave Receive Mode (SEN = 1) ............ 170
10-Bit Slave Transmit Mode ............................ 170
7-Bit Slave Receive Mode (SEN = 1) .............. 170
7-Bit Slave Transmit Mode .............................. 170
 2004 Microchip Technology Inc.
Preliminary
DS39636A-page 367