PIC18F2X1X Datasheet, PDF(239/380 Page) Microchip Technology – 28/40/44-PIN FLASH MICROCONTROLLERS WITH 10-BIT A/D AND NANO WATT TECHNOLOGY

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PIC18F2X1X Datasheet, PDF (239/380 Pages) Microchip Technology – 28/40/44-PIN FLASH MICROCONTROLLERS WITH 10-BIT A/D AND NANO WATT TECHNOLOGY

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PIC18F2X1X/4X1X

22.0 SPECIAL FEATURES OF

THE CPU

PIC18F2X1X/4X1X devices include several features

intended to maximize reliability and minimize cost

through elimination of external components. These are:

â¢ Oscillator Selection

â¢ Resets:

- Power-on Reset (POR)

- Power-up Timer (PWRT)

- Oscillator Start-up Timer (OST)

- Brown-out Reset (BOR)

â¢ Interrupts

â¢ Watchdog Timer (WDT)

â¢ Fail-Safe Clock Monitor

â¢ Two-Speed Start-up

â¢ Code Protection

â¢ ID Locations

â¢ In-Circuit Serial Programming

The oscillator can be configured for the application

depending on frequency, power, accuracy and cost. All

of the options are discussed in detail in Section 2.0

âOscillator Configurationsâ.

A complete discussion of device Resets and interrupts

is available in previous sections of this data sheet.

In addition to their Power-up and Oscillator Start-up

Timers provided for Resets, PIC18F2X1X/4X1X

devices have a Watchdog Timer, which is either

permanently enabled via the configuration bits or

software controlled (if configured as disabled).

The inclusion of an internal RC oscillator also provides

the additional benefits of a Fail-Safe Clock Monitor

(FSCM) and Two-Speed Start-up. FSCM provides for

background monitoring of the peripheral clock and

automatic switchover in the event of its failure. Two-

Speed Start-up enables code to be executed almost

immediately on start-up, while the primary clock source

completes its start-up delays.

All of these features are enabled and configured by

setting the appropriate configuration register bits.

22.1 Configuration Bits

The configuration bits can be programmed (read as â0â)

or left unprogrammed (read as â1â) to select various

device configurations. These bits are mapped starting

at program memory location 300000h.

The user will note that address 300000h is beyond the

user program memory space. In fact, it belongs to the

configuration memory space (300000h-3FFFFFh), which

can only be accessed using table reads.

TABLE 22-1: CONFIGURATION BITS AND DEVICE IDs

File Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default/

Unprogrammed

Value

300001h

300002h

300003h

300005h

300006h

300008h

300009h

30000Ah

30000Bh

30000Ch

30000Dh

3FFFFEh

3FFFFFh

Legend:

Note 1:

2:

3:

CONFIG1H IESO FCMEN

â

â

FOSC3 FOSC2 FOSC1 FOSC0 00-- 0111

CONFIG2L

â

â

â

BORV1 BORV0 BOREN1 BOREN0 PWRTEN ---1 1111

CONFIG2H

â

â

â

WDTPS3 WDTPS2 WDTPS1 WDTPS0 WDTEN ---1 1111

CONFIG3H MCLRE

â

â

â

â

LPT1OSC PBADEN CCP2MX 1--- -011

CONFIG4L DEBUG XINST

â

CONFIG5L

â

â

â

â

â

LVP

â

STVREN 10-- -1-1

â

CP3(1,2)

CP2(1)

CP1

CP0

---- 1111

CONFIG5H

â

CPB

â

CONFIG6L

â

â

â

â

â

â

â

â

-1-- ----

â

WRT3(1,2) WRT2(1) WRT1

WRT0

---- 1111

CONFIG6H

â

CONFIG7L

â

WRTB

â

WRTC

â

â

â

â

â

â

-11- ----

â

EBTR3(1,2) EBTR2(1) EBTR1 EBTR0

---- 1111

CONFIG7H

DEVID1(3)

DEVID2(3)

â

DEV2

DEV10

EBTRB

DEV1

DEV9

â

DEV0

DEV8

â

REV4

DEV7

â

REV3

DEV6

â

REV2

DEV5

â

REV1

DEV4

â

REV0

DEV3

-1-- ----

xxxx xxxx(3)

0000 1100

x = unknown, u = unchanged, â = unimplemented, q = value depends on condition.

Shaded cells are unimplemented, read as â0â.

Unimplemented in PIC18F2410/4410 devices; maintain this bit set.

Unimplemented in PIC18F2515/4515 devices, maintain this bit set.

See Register 22-14 for DEVID1 values. DEVID registers are read-only and cannot be programmed by the user.

ï£© 2004 Microchip Technology Inc.

Preliminary

DS39636A-page 237

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