PIC16LF1847 Datasheet, PDF (361/408 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1847
TABLE 30-2: OSCILLATOR PARAMETERS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param
No.
Sym.
Characteristic
Freq.
Tolerance
OS08 HFOSC Internal Calibrated HFINTOSC
Frequency⁽²⁾
OS08A MFOSC Internal Calibrated MFINTOSC
Frequency⁽²⁾
OS09
OS10*
LFOSC Internal LFINTOSC Frequency
TIOSC ST HFINTOSC
Wake-up from Sleep Start-up Time
2%
3%
5%
2%
3%
5%
—
—
Min.
—
—
—
—
—
—
21.5
—
Typ† Max. Units
Conditions
16.0 — MHz 0°C  TA  +60°C, VDD  2.5V
16.0 — MHz 60°C  TA  +85°C, VDD  2.5V
16.0 — MHz -40°C  TA  +125°C
500 — kHz 0°C  TA  +60°C, VDD  2.5V
500 — kHz 60°C  TA  +85°C, VDD  2.5V
500 — kHz -40°C  TA  +125°C
31 40.5 kHz -40°C  TA  +125°C
5
8
s
*
†
Note 1:
2:
3:
MFINTOSC
Wake-up from Sleep Start-up Time
—
—
20
30
s
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing code.
Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current con-
sumption. All devices are tested to operate at “min” values with an external clock applied to the OSC1 pin. When an exter-
nal clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices.
To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1 F and 0.01 F values in parallel are recommended.
By design.
TABLE 30-3: PLL CLOCK TIMING SPECIFICATIONS (VDD = 2.7V TO 5.5V)
Param
No.
Sym.
Characteristic
Min.
Typ†
Max. Units Conditions
F10
F11
F12
F13*
FOSC Oscillator Frequency Range
4
—
8
MHz
FSYS On-Chip VCO System Frequency
16
—
32 MHz
TRC PLL Start-up Time (Lock Time)
—
—
2
ms
CLK CLKOUT Stability (Jitter)
-0.25%
—
+0.25% %
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
 2011 Microchip Technology Inc.
Preliminary
DS41453A-page 363