PIC16LF1847 Datasheet, PDF (348/408 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F1847
30.1 DC Characteristics: PIC16(L)F1847-I/E (Industrial, Extended)
PIC16LF1847
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C  TA  +85°C for industrial
-40°C  TA  +125°C for extended
PIC16F1847
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C  TA  +85°C for industrial
-40°C  TA  +125°C for extended
Param. Sym.
No.
Characteristic
Min. Typ† Max. Units
Conditions
D001 VDD
Supply Voltage
PIC16LF1847 1.8
—
3.6
V FOSC  16 MHz:
2.5
—
3.6
V FOSC  32 MHz (NOTE 2)
D001
PIC16F1847 1.8
—
5.5
V FOSC  16 MHz:
2.5
—
5.5
V FOSC  32 MHz (NOTE 2)
D002* VDR
RAM Data Retention Voltage⁽¹⁾
PIC16LF1847 1.5
—
—
V Device in Sleep mode
D002*
PIC16F1847 1.7
—
—
V Device in Sleep mode
VPOR*
Power-on Reset Release Voltage
—
1.6
—
V
VPORR* Power-on Reset Rearm Voltage
PIC16LF1847 —
0.8
—
V Device in Sleep mode
PIC16F1847 —
1.7
—
V Device in Sleep mode
D003 VADFVR Fixed Voltage Reference Voltage for -7
ADC, Initial Accuracy
-8
-7
-8
-7
-8
6
% 1.024V, VDD  1.8V, 85°C (NOTE 3)
6
1.024V, VDD  1.8V, 125°C (NOTE 3)
6
2.048V, VDD  2.5V, 85°C
6
2.048V, VDD  2.5V, 125°C
6
4.096V, VDD  4.75V, 85°C
6
4.096V, VDD  4.75V, 125°C
D003A VCDAFVR Fixed Voltage Reference Voltage for -11
Comparator and DAC, Initial Accu- -11
racy
-11
-11
-11
-11
7
% 1.024V, VDD  2.5V, 85°C
7
1.024V, VDD  2.5V, 125°C
7
2.048V, VDD  2.5V, 85°C
7
2.048V, VDD  2.5V, 125°C
7
4.096V, VDD  4.75V, 85°C
7
4.096V, VDD  4.75V, 125°C
D003C* TCVFVR Temperature Coefficient, Fixed Voltage —
Reference
-114
— ppm/
°C
D003D* VFVR/
VIN
Line Regulation, Fixed Voltage
Reference
— 0.225 — %/V
D004* SVDD
VDD Rise Rate to ensure internal
Power-on Reset signal
0.05 —
— V/ms See Section 7.1 “Power-on Reset
(POR)” for details.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
2: PLL required for 32 MHz operation.
3: For proper operation, the minimum value of the ADC positive voltage reference must be 1.8V or greater. When selecting
the FVR or the VREF+ pin as the source of the ADC positive voltage reference, be aware that the voltage must be 1.8V or
greater.
DS41453A-page 350
Preliminary
 2011 Microchip Technology Inc.