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PIC16LF1847 Datasheet, PDF (335/408 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology | |||
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29.2 Instruction Descriptions
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Description:
Add Literal to FSRn
[ label ] ADDFSR FSRn, k
-32 ï£ k ï£ 31
n ï [ 0, 1]
FSR(n) + k ï® FSR(n)
None
The signed 6-bit literal âkâ is added to
the contents of the FSRnH:FSRnL
register pair.
FSRn is limited to the range 0000h -
FFFFh. Moving beyond these bounds
will cause the FSR to wrap-around.
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Add literal and W
[ label ] ADDLW k
0 ï£ k ï£ 255
(W) + k ï® (W)
C, DC, Z
The contents of the W register are
added to the eight-bit literal âkâ and the
result is placed in the W register.
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Add W and f
[ label ] ADDWF f,d
0 ï£ f ï£ 127
d ïï ï0,1ï
(W) + (f) ï® (destination)
C, DC, Z
Add the contents of the W register
with register âfâ. If âdâ is â0â, the result is
stored in the W register. If âdâ is â1â, the
result is stored back in register âfâ.
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADD W and CARRY bit to f
[ label ] ADDWFC f {,d}
0 ï£ f ï£ 127
d ïï [0,1]
(W) + (f) + (C) ï® dest
C, DC, Z
Add W, the Carry flag and data mem-
ory location âfâ. If âdâ is â0â, the result is
placed in W. If âdâ is â1â, the result is
placed in data memory location âfâ.
PIC16(L)F1847
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND literal with W
[ label ] ANDLW k
0 ï£ k ï£ 255
(W) .AND. (k) ï® (W)
Z
The contents of W register are
ANDâed with the eight-bit literal âkâ.
The result is placed in the W register.
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND W with f
[ label ] ANDWF f,d
0 ï£ f ï£ 127
d ïï ï0,1ï
(W) .AND. (f) ï® (destination)
Z
AND the W register with register âfâ. If
âdâ is â0â, the result is stored in the W
register. If âdâ is â1â, the result is stored
back in register âfâ.
ASRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Arithmetic Right Shift
[ label ] ASRF f {,d}
0 ï£ f ï£ 127
d ïï [0,1]
(f<7>)ï® dest<7>
(f<7:1>) ï® dest<6:0>,
(f<0>) ï® C,
C, Z
The contents of register âfâ are shifted
one bit to the right through the Carry
flag. The MSb remains unchanged. If
âdâ is â0â, the result is placed in W. If âdâ
is â1â, the result is stored back in reg-
ister âfâ.
register f
C
ï£ 2011 Microchip Technology Inc.
Preliminary
DS41453A-page 337
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