English
Language : 

PIC24HJ256GP210A-I Datasheet, PDF (319/326 Pages) Microchip Technology – 16-bit Microcontrollers with Advanced Analog
PIC24HJXXXGPX06A/X08A/X10A
R
Reader Response ............................................................. 322
Registers
ADxCHS0 (ADCx Input Channel 0 Select................. 217
ADxCHS123 (ADCx Input
Channel 1, 2, 3 Select) ..................................... 216
ADxCON1 (ADCx Control 1)..................................... 211
ADxCON2 (ADCx Control 2)..................................... 213
ADxCON3 (ADCx Control 3)..................................... 214
ADxCON4 (ADCx Control 4)..................................... 215
ADxCSSH (ADCx Input Scan Select High)............... 218
ADxCSSL (ADCx Input Scan Select Low) ................ 218
ADxPCFGH (ADCx Port Configuration High) ........... 219
ADxPCFGL (ADCx Port Configuration Low)............. 220
CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 193
CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 194
CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 195
CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 196
CiCFG1 (ECAN Baud Rate Configuration 1) ............ 190
CiCFG2 (ECAN Baud Rate Configuration 2) ............ 191
CiCTRL1 (ECAN Control 1) ...................................... 182
CiCTRL2 (ECAN Control 2) ...................................... 183
CiEC (ECAN Transmit/Receive Error Count)............ 189
CiFCTRL (ECAN FIFO Control)................................ 185
CiFEN1 (ECAN Acceptance Filter Enable) ............... 192
CiFIFO (ECAN FIFO Status)..................................... 186
CiFMSKSEL1 (ECAN Filter 7-0 Mask
Selection) .................................................. 198, 199
CiINTE (ECAN Interrupt Enable) .............................. 188
CiINTF (ECAN Interrupt Flag)................................... 187
CiRXFnEID (ECAN Acceptance Filter n
Extended Identifier)........................................... 197
CiRXFnSID (ECAN Acceptance Filter n
Standard Identifier) ........................................... 197
CiRXFUL1 (ECAN Receive Buffer Full 1) ................. 201
CiRXFUL2 (ECAN Receive Buffer Full 2) ................. 201
CiRXMnEID (ECAN Acceptance Filter Mask n
Extended Identifier)........................................... 200
CiRXMnSID (ECAN Acceptance Filter Mask n
Standard Identifier) ........................................... 200
CiRXOVF1 (ECAN Receive Buffer Overflow 1) ........ 202
CiRXOVF2 (ECAN Receive Buffer Overflow 2) ........ 202
CiTRBnDLC (ECAN Buffer n Data
Length Control) ................................................. 205
CiTRBnEID (ECAN Buffer n Extended Identifier) ..... 204
CiTRBnSID (ECAN Buffer n Standard Identifier) ...... 204
CiTRBnSTAT (ECAN Receive Buffer n Status) ........ 206
CiTRmnCON (ECAN TX/RX Buffer m Control)......... 203
CiVEC (ECAN Interrupt Code).................................. 184
CLKDIV (Clock Divisor)............................................. 128
CORCON (Core Control) ...................................... 27, 74
DMACS0 (DMA Controller Status 0)......................... 119
DMACS1 (DMA Controller Status 1)......................... 121
DMAxCNT (DMA Channel x Transfer Count) ........... 118
DMAxCON (DMA Channel x Control) ....................... 115
DMAxPAD (DMA Channel x Peripheral Address)..... 118
DMAxREQ (DMA Channel x IRQ Select) ................. 116
DMAxSTA (DMA Channel x RAM Start
Address A) ........................................................ 117
DMAxSTB (DMA Channel x RAM Start
Address B) ........................................................ 117
DSADR (Most Recent DMA RAM Address).............. 122
I2CxCON (I2Cx Control) ........................................... 168
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 172
I2CxSTAT (I2Cx Status) ........................................... 170
ICxCON (Input Capture x Control)............................ 154
IEC0 (Interrupt Enable Control 0) ............................... 85
IEC1 (Interrupt Enable Control 1) ............................... 87
IEC2 (Interrupt Enable Control 2) ............................... 89
IEC3 (Interrupt Enable Control 3) ............................... 91
IEC4 (Interrupt Enable Control 4) ............................... 92
IFS0 (Interrupt Flag Status 0) ..................................... 77
IFS1 (Interrupt Flag Status 1) ..................................... 79
IFS2 (Interrupt Flag Status 2) ..................................... 81
IFS3 (Interrupt Flag Status 3) ..................................... 83
IFS4 (Interrupt Flag Status 4) ..................................... 84
INTCON1 (Interrupt Control 1) ................................... 75
INTCON2 (Interrupt Control 2) ................................... 76
IPC0 (Interrupt Priority Control 0) ............................... 93
IPC1 (Interrupt Priority Control 1) ............................... 94
IPC10 (Interrupt Priority Control 10) ......................... 103
IPC11 (Interrupt Priority Control 11) ......................... 104
IPC12 (Interrupt Priority Control 12) ......................... 105
IPC13 (Interrupt Priority Control 13) ......................... 106
IPC14 (Interrupt Priority Control 14) ......................... 107
IPC15 (Interrupt Priority Control 15) ......................... 107
IPC16 (Interrupt Priority Control 16) ................. 108, 110
IPC17 (Interrupt Priority Control 17) ......................... 109
IPC2 (Interrupt Priority Control 2) ............................... 95
IPC3 (Interrupt Priority Control 3) ............................... 96
IPC4 (Interrupt Priority Control 4) ............................... 97
IPC5 (Interrupt Priority Control 5) ............................... 98
IPC6 (Interrupt Priority Control 6) ............................... 99
IPC7 (Interrupt Priority Control 7) ............................. 100
IPC8 (Interrupt Priority Control 8) ............................. 101
IPC9 (Interrupt Priority Control 9) ............................. 102
NVMCON (Flash Memory Control)............................. 61
OCxCON (Output Compare x Control) ..................... 157
OSCCON (Oscillator Control)................................... 126
OSCTUN (FRC Oscillator Tuning)............................ 130
PLLFBD (PLL Feedback Divisor) ............................. 129
PMD1 (Peripheral Module Disable Control
Register 1) ........................................................ 135
PMD1 (Peripheral Module Disable Control
Register 1) ........................................................ 135
PMD2 (Peripheral Module Disable Control
Register 2) ........................................................ 137
PMD3 (Peripheral Module Disable Control
Register 3) ........................................................ 139
RCON (Reset Control)................................................ 66
SPIxCON1 (SPIx Control 1) ..................................... 162
SPIxCON2 (SPIx Control 2) ..................................... 164
SPIxSTAT (SPIx Status and Control) ....................... 161
SR (CPU Status) .................................................. 26, 74
T1CON (Timer1 Control) .......................................... 146
TxCON (T2CON, T4CON, T6CON or
T8CON Control)................................................ 150
TyCON (T3CON, T5CON, T7CON or
T9CON Control)................................................ 151
UxMODE (UARTx Mode) ......................................... 175
UxSTA (UARTx Status and Control) ........................ 177
Reset
Clock Source Selection .............................................. 67
Special Function Register Reset States ..................... 68
Times.......................................................................... 67
Reset Sequence ................................................................. 69
Resets ................................................................................ 65
 2009-2012 Microchip Technology Inc.
DS70592D-page 319