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PIC24HJ256GP210A-I Datasheet, PDF (229/326 Pages) Microchip Technology – 16-bit Microcontrollers with Advanced Analog | |||
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PIC24HJXXXGPX06A/X08A/X10A
22.0 INSTRUCTION SET SUMMARY
Note:
This data sheet summarizes the features
of the PIC24HJXXXGPX06A/X08A/X10A
families of devices. However, it is not
intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
related section in the âdsPIC33F/PIC24H
Family Reference Manualâ, which is
available from the Microchip web site
(www.microchip.com).
The PIC24H instruction set is identical to that of the
PIC24F, and is a subset of the dsPIC30F/33F
instruction set.
Most instructions are a single program memory word
(24 bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word, divided
into an 8-bit opcode, which specifies the instruction
type and one or more operands, which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
⢠Word or byte-oriented operations
⢠Bit-oriented operations
⢠Literal operations
⢠DSP operations
⢠Control operations
Table 22-1 shows the general symbols used in
describing the instructions.
The PIC24H instruction set summary in Table 22-2 lists
all the instructions, along with the status flags affected
by each instruction.
Most word or byte-oriented W register instructions
(including barrel shift instructions) have three
operands:
⢠The first source operand which is typically a
register âWbâ without any address modifier
⢠The second source operand which is typically a
register âWsâ with or without an address modifier
⢠The destination of the result which is typically a
register âWdâ with or without an address modifier
However, word or byte-oriented file register instructions
have two operands:
⢠The file register specified by the value âfâ
⢠The destination, which could either be the file
register âfâ or the W0 register, which is denoted as
âWREGâ
Most bit-oriented instructions (including simple
rotate/shift instructions) have two operands:
⢠The W register (with or without an address
modifier) or file register (specified by the value of
âWsâ or âfâ)
⢠The bit in the W register or file register
(specified by a literal value or indirectly by the
contents of register âWbâ)
The literal instructions that involve data movement may
use some of the following operands:
⢠A literal value to be loaded into a W register or file
register (specified by the value of âkâ)
⢠The W register or file register where the literal
value is to be loaded (specified by âWbâ or âfâ)
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
⢠The first source operand which is a register âWbâ
without any address modifier
⢠The second source operand which is a literal
value
⢠The destination of the result (only if not the same
as the first source operand) which is typically a
register âWdâ with or without an address modifier
The control instructions may use some of the following
operands:
⢠A program memory address
⢠The mode of the table read and table write
instructions
All instructions are a single word, except for certain
double word instructions, which were made double
word instructions so that all the required information is
available in these 48 bits. In the second word, the
8 MSbs are â0âs. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true, or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all table
reads and writes and RETURN/RETFIE instructions,
which are single-word instructions but take two or three
cycles. Certain instructions that involve skipping over the
subsequent instruction require either two or three cycles
if the skip is performed, depending on whether the
instruction being skipped is a single-word or double word
instruction. Moreover, double word moves require two
cycles. The double word instructions execute in two
instruction cycles.
Note:
For more details on the instruction set,
refer to the â16-bit MCU and DSC
Programmerâs Reference Manualâ
(DS70157).
ï£ 2009-2012 Microchip Technology Inc.
DS70592D-page 229
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