PIC24HJ256GP210A-I Datasheet, PDF (318/326 Pages) Microchip Technology – 16-bit Microcontrollers with Advanced Analog

PIC24HJXXXGPX06A/X08A/X10A
F
Flash Program Memory....................................................... 59
Control Registers ........................................................ 60
Operations .................................................................. 60
Programming Algorithm .............................................. 62
RTSP Operation.......................................................... 60
Table Instructions........................................................ 59
Flexible Configuration ....................................................... 221
FSCM
Delay for Crystal and PLL Clock Sources ................... 68
Device Resets ............................................................. 68
H
High Temperature Electrical Characteristics..................... 287
I
I/O Ports ............................................................................ 141
Parallel I/O (PIO)....................................................... 141
Write/Read Timing .................................................... 142
I²C
Operating Modes ...................................................... 165
Registers ................................................................... 167
I²C Module
I2C1 Register Map ...................................................... 40
I2C2 Register Map ...................................................... 40
In-Circuit Debugger ........................................................... 228
In-Circuit Emulation........................................................... 221
In-Circuit Serial Programming (ICSP) ....................... 221, 228
Input Capture
Registers ................................................................... 154
Input Change Notification Module ..................................... 142
Instruction Addressing Modes............................................. 53
File Register Instructions ............................................ 53
Fundamental Modes Supported.................................. 54
MCU Instructions ........................................................ 53
Move and Accumulator Instructions ............................ 54
Other Instructions........................................................ 54
Instruction Set
Overview ................................................................... 231
Summary................................................................... 229
Instruction-Based Power-Saving Modes ........................... 133
Idle ............................................................................ 134
Sleep ......................................................................... 133
Internal RC Oscillator
Use with WDT ........................................................... 227
Internet Address................................................................ 321
Interrupt Control and Status Registers................................ 73
IECx ............................................................................ 73
IFSx............................................................................. 73
INTCON1 .................................................................... 73
INTCON2 .................................................................... 73
INTTREG .................................................................... 73
IPCx ............................................................................ 73
Interrupt Setup Procedures ............................................... 111
Initialization ............................................................... 111
Interrupt Disable........................................................ 111
Interrupt Service Routine .......................................... 111
Trap Service Routine ................................................ 111
Interrupt Vector Table (IVT) ................................................ 69
Interrupts Coincident with Power Save Instructions.......... 134
J
JTAG Boundary Scan Interface ........................................ 221
M
Memory Organization ......................................................... 29
Microchip Internet Web Site.............................................. 321
Modes of Operation
Disable...................................................................... 181
Initialization ............................................................... 181
Listen All Messages.................................................. 181
Listen Only................................................................ 181
Loopback .................................................................. 181
Normal Operation ..................................................... 181
MPLAB ASM30 Assembler, Linker, Librarian ................... 238
MPLAB Integrated Development
Environment Software .............................................. 237
MPLAB PM3 Device Programmer .................................... 240
MPLAB REAL ICE In-Circuit Emulator System ................ 239
MPLINK Object Linker/MPLIB Object Librarian ................ 238
Multi-Bit Data Shifter........................................................... 28
N
NVM Module
Register Map .............................................................. 52
O
Open-Drain Configuration................................................. 142
Output Compare ............................................................... 155
P
Packaging ......................................................................... 301
Details....................................................................... 304
Marking ..................................................................... 301
Peripheral Module Disable (PMD) .................................... 134
Pinout I/O Descriptions (table)............................................ 17
PMD Module
Register Map .............................................................. 52
POR and Long Oscillator Start-up Times ........................... 68
PORTA
Register Map .............................................................. 50
PORTB
Register Map .............................................................. 50
PORTC
Register Map .............................................................. 50
PORTD
Register Map .............................................................. 50
PORTE
Register Map .............................................................. 51
PORTF
Register Map .............................................................. 51
PORTG
Register Map .............................................................. 51
Power-Saving Features .................................................... 133
Clock Frequency and Switching ............................... 133
Program Address Space..................................................... 29
Construction ............................................................... 55
Data Access from Program Memory Using
Program Space Visibility..................................... 58
Data Access from Program Memory
Using Table Instructions ..................................... 57
Data Access from, Address Generation ..................... 56
Memory Map............................................................... 29
Table Read Instructions
TBLRDH ............................................................. 57
TBLRDL.............................................................. 57
Visibility Operation ...................................................... 58
Program Memory
Interrupt Vector ........................................................... 30
Organization ............................................................... 30
Reset Vector ............................................................... 30
DS70592D-page 318
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