PIC16F737-I Datasheet, PDF (272/276 Pages) Microchip Technology – 28/40/44-Pin, 8-Bit CMOS Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC16F7X7
Parallel Slave Port Write ............................................. 71
PWM Output ............................................................... 91
Repeated Start Condition.......................................... 122
Reset, Watchdog Timer,
Oscillator Start-up Timer and
Power-up Timer ................................................ 225
Slave Mode General Call Address Sequence
(7 or 10-Bit Address Mode)............................... 116
Slave Synchronization (SPI Mode) ............................. 99
Slow Rise Time (MCLR Tied to VDD
Through RC Network) ....................................... 183
SPI Master Mode (CKE = 0, SMP = 0) ..................... 229
SPI Master Mode (CKE = 1, SMP = 1) ..................... 229
SPI Mode (Master Mode) ............................................ 98
SPI Mode (Slave Mode with CKE = 0) ...................... 100
SPI Mode (Slave Mode with CKE = 1) ...................... 100
SPI Slave Mode (CKE = 0) ....................................... 230
SPI Slave Mode (CKE = 1) ....................................... 230
Stop Condition Receive or
Transmit Mode .................................................. 126
Switching to SEC_RUN Mode .................................... 42
Synchronous Reception
(Master Mode, SREN)....................................... 147
Synchronous Transmission....................................... 145
Synchronous Transmission
(Through TXEN)................................................ 145
Time-out Sequence on Power-up (MCLR Tied
to VDD Through Pull-up Resistor) ..................... 182
Time-out Sequence on Power-up (MCLR Tied
to VDD Through RC Network): Case 1 .............. 182
Time-out Sequence on Power-up (MCLR Tied
to VDD Through RC Network): Case 2 .............. 182
Timer0 and Timer1 External Clock ........................... 226
Timer1 Incrementing Edge.......................................... 79
Transition Between SEC_RUN/RC_RUN
and Primary Clock............................................... 44
Two-Speed Start-up .................................................. 188
Wake-up from Sleep via Interrupt ............................. 191
XT, HS, LP, EC, EXTRC to
RC_RUN Mode ................................................... 41
Timing Parameter Symbology........................................... 222
Timing Requirements
AUSART Synchronous Receive ............................... 234
AUSART Synchronous Transmission ....................... 234
Capture/Compare/PWM
(All CCP Modules) ............................................ 227
CLKO and I/O ........................................................... 224
External Clock ........................................................... 223
I²C Bus Data ............................................................. 233
I²C Bus Start/Stop Bits.............................................. 232
Parallel Slave Port .................................................... 228
Reset, Watchdog Timer,
Oscillator Start-up Timer,
Power-up Timer and Brown-out Reset.............. 225
SPI Mode .................................................................. 231
Timer0 and Timer1 External Clock ........................... 226
TMR1CS Bit........................................................................ 78
TMR1ON Bit ....................................................................... 78
TMR2ON Bit ....................................................................... 86
TOUTPS<3:0> Bits ............................................................. 86
TRISA Register................................................................... 49
TRISB Register................................................................... 56
TRISC Register................................................................... 65
TRISD Register................................................................... 67
TRISE Register................................................................... 68
IBF Bit ......................................................................... 69
IBOV Bit ...................................................................... 69
PSPMODE Bit....................................................... 67, 68
Two-Speed Clock Start-up Mode...................................... 188
Two-Speed Start-up.......................................................... 169
TXSTA Register
BRGH Bit .................................................................. 133
CSRC Bit .................................................................. 133
TRMT Bit................................................................... 133
TX9 Bit ...................................................................... 133
TX9D Bit ................................................................... 133
TXEN Bit ................................................................... 133
V
Voltage Reference Specifications..................................... 220
W
Wake-up from Sleep ................................................. 169, 190
Interrupts .......................................................... 179, 180
WDT Reset ............................................................... 180
Wake-up Using Interrupts ................................................. 191
Watchdog Timer (WDT)............................................ 169, 186
Associated Registers ................................................ 187
WDT Reset, Normal Operation................. 172, 179, 180
WDT Reset, Sleep .................................... 172, 179, 180
WCOL ....................................................... 121, 122, 123, 126
WCOL Status Flag.................................... 121, 122, 123, 126
WWW, On-Line Support ....................................................... 4
DS30498C-page 270
 2004 Microchip Technology Inc.