PIC16F872 Datasheet, PDF (27/160 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS FLASH Microcontroller

3.3 PORTC and the TRISC Register
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (=1) will make the corresponding PORTC pin
an input (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISC bit (=0) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 3-5). PORTC pins have Schmitt Trigger input
buffers.
When the I²C module is enabled, the PORTC (3:4) pins
can be configured with normal I²C levels or with
SMBUS levels by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination should be avoided. The user should refer to
the corresponding peripheral section for the correct
TRIS bit settings.
FIGURE 3-5: PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<0:2>
RC<5:7>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
Data Bus
0
VDD
DQ
WR
1
P
Port
CK Q
WR
TRIS
Data Latch
DQ
CK Q
TRIS Latch
I/O
pin⁽¹⁾
N
VSS
Peripheral
OE⁽³⁾
RD TRIS
Schmitt
Trigger
QD
RD
EN
Port
Peripheral Input
Note 1:
2:
3:
I/O pins have diode protection to VDD and VSS.
Port/Peripheral select signal selects between port
data and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
PIC16F872
FIGURE 3-6:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<3:4>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
0
Data Bus
DQ
WR
1
Port
CK Q
WR
TRIS
Data Latch
DQ
CK Q
TRIS Latch
VDD
P
I/O
pin⁽¹⁾
N
Vss
Peripheral
OE⁽³⁾
RD TRIS
RD
Port
SSPl Input
Schmitt
Trigger
QD
EN
Schmitt
Trigger
with
SMBus
0 ^levels
1
CKE
SSPSTAT<6>
Note 1: I/O pins have diode protection to VDD and VSS.
2: Port/Peripheral select signal selects between port
data and peripheral output.
3: Peripheral OE (output enable) is only activated if
peripheral select is active.
© 1999 Microchip Technology Inc.
Preliminary
DS30221A-page 27