PIC16F872 Datasheet, PDF (14/160 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS FLASH Microcontroller

PIC16F872
2.2.2.3 INTCON REGISTER
The INTCON Register is a readable and writable regis-
ter, which contains various enable and flag bits for the
TMR0 register overflow, RB Port change and External
RB0/INT pin interrupts.
Note:
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
REGISTER 2-3: INTCON REGISTER (ADDRESS 0Bh, 8Bh, 10Bh, 18Bh)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-x
GIE
bit7
PEIE
T0IE
INTE RBIE
T0IF
INTF
RBIF
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n= Value at POR reset
bit 7:
GIE: Global Interrupt Enable bit
1 = Enables all un-masked interrupts
0 = Disables all interrupts
bit 6:
PEIE: Peripheral Interrupt Enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
bit 5:
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
bit 4:
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
bit 3:
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
bit 2:
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
bit 1:
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
bit 0:
RBIF: RB Port Change Interrupt Flag bit
1 = At least one of the RB<7:4> pins changed state (must be cleared in software)
0 = None of the RB<7:4> pins have changed state
DS30221A-page 14
Preliminary
© 1999 Microchip Technology Inc.