PIC16F872 Datasheet, PDF (13/160 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS FLASH Microcontroller

PIC16F872
2.2.2.2 OPTION_REG REGISTER
The OPTION_REG Register is a readable and writable
register, which contains various control bits to configure
the TMR0 prescaler/WDT postscaler (single assign-
able register known also as the prescaler), the External
INT Interrupt, TMR0 and the weak pull-ups on PORTB.
Note:
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer.
REGISTER 2-2: OPTION_REG REGISTER (ADDRESS 81h, 181h)
R/W-1
RBPU
bit7
R/W-1 R/W-1 R/W-1 R/W-1
INTEDG T0CS T0SE PSA
R/W-1
PS2
R/W-1
PS1
R/W-1
PS0
bit0
bit 7:
RBPU: PORTB Pull-up Enable bit
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
bit 6:
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
bit 5:
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
bit 4:
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
bit 3:
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
bit 2-0: PS<2:0>: Prescaler Rate Select bits
Bit Value TMR0 Rate WDT Rate
000
1:2
1:1
001
1:4
1:2
010
1:8
1:4
011
1 : 16
1:8
100
1 : 32
1 : 16
101
1 : 64
1 : 32
110
1 : 128
1 : 64
111
1 : 256
1 : 128
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n= Value at POR reset
Note: When using Low Voltage ICSP Programming (LVP) and the pull-ups on PORTB are enabled, bit 3 in the
TRISB register must be cleared to disable the pull-up on RB3 and ensure the proper operation of the device.
© 1999 Microchip Technology Inc.
Preliminary
DS30221A-page 13