LAN8820 Datasheet, PDF (25/83 Pages) Microchip Technology – RGMII 10/100/1000 Ethernet Transceiver

LAN8820/LAN8820I
Note:
The HPD pin is also a dedicated configuration pin. HPD forces the entire device to power down except for
the management interface. The Hardware Power-Down mode is described in Section 3.7.3, "Hardware
Power-Down," on page 23.
3.8.1.2.1
Configuring the SMI Address (CONFIG[1:0])
The SMI address may be configured via hardware to any value between 0 and 7. If an address greater than 7 is required,
the user can configure the PHY address using Software Configuration via the PHYADD[4:0] field of the 10/100 Special
Modes Register (after SMI communication at an address is established).
The CONFIG1 pin is used to configure both the SMI address and the value of the Pause Operation (PAUSE) bit in the
Auto Negotiation Advertisement Register. The user must first determine the desired PAUSE value. The configuration
pin values for CONFIG1 and CONFIG0 should then be selected using Table 3-6 (PAUSE=0) or Table 3-7 (PAUSE=1),
respectively.
TABLE 3-6: SMI ADDRESS CONFIGURATION WITH PAUSE=0
PHYADD[2:0]
000
001
010
011
100
101
110
111
CONFIG1
CPV(0)
CPV(0)
CPV(0)
CPV(0)
CPV(1)
CPV(1)
CPV(1)
CPV(1)
CONFIG0
CPV(0)
CPV(1)
CPV(2)
CPV(3)
CPV(0)
CPV(1)
CPV(2)
CPV(3)
TABLE 3-7: SMI ADDRESS CONFIGURATION WITH PAUSE=1
PHYADD[2:0]
000
001
010
011
100
101
110
111
CONFIG1
CPV(2)
CPV(2)
CPV(2)
CPV(2)
CPV(3)
CPV(3)
CPV(3)
CPV(3)
CONFIG0
CPV(0)
CPV(1)
CPV(2)
CPV(3)
CPV(0)
CPV(1)
CPV(2)
CPV(3)
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DS00001871B-page 25