MAX14830_15 Datasheet, PDF (62/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
READ SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W A
REGISTER ADDRESS
A
Sr
DEVICE SLAVE ADDRESS - R A
8 DATA BITS
NA
P
FROM MASTER TO STAVE
Figure 24. Read Byte Sequence
FROM SLAVE TO MASTER
BURST READ
S
DEVICE SLAVE ADDRESS - W A
REGISTER ADDRESS
A
Sr
DEVICE SLAVE ADDRESS - R A
8 DATA BITS - 1
A
8 DATA BITS - 2
A
8 DATA BITS - 3
A
8 DATA BITS - N
NA
P
FROM MASTER TO STAVE
FROM SLAVE TO MASTER
Figure 25. Burst Read Sequence
Single-Byte Read
With this operation the master sends an address and
receives 1 or 2 data bytes from the slave device
(Figure 24). The read byte procedure is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write bit
(low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address
5) The active slave asserts an ACK on the data line only
if the address is valid (NAK if not).
6) The master sends a repeated START (Sr).
7) The master sends the 7-bit slave ID plus a read bit
(high).
8) The addressed slave asserts an ACK on the data line.
9) The slave sends 8 data bits.
10) The master asserts a NACK on the data line.
11) The master generates a STOP condition.
Burst Read
With this operation the master sends an address and
receives multiple data bytes from the slave device
(Figure 25). The burst read procedure is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write bit
(low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not).
6) The master sends a repeated START condition.
7) The master sends the 7-bit slave ID plus a read bit
(high).
8) The slave asserts an ACK on the data line.
9) The slave sends 8 bits of data.
10) The master asserts an ACK on the data line.
11) Repeat 9 and 10 (N-2) times.
12) The slave sends the last 8 data bits.
13) The master asserts a NACK on the data line.
14) The master generates a STOP condition.
www.maximintegrated.com
Maxim Integrated │  62