MAX14830_15 Datasheet, PDF (49/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
GPIOConfg—GPIO Configuration Register
ADDRESS:
MODE:
BIT
NAME
RESET
7
GP3OD
0
0x18
R/W
6
GP2OD
0
5
GP1OD
0
4
GP0OD
0
3
GP3Out
0
2
GP2Out
0
1
GP1Out
0
0
GP0Out
0
Bits 7–4: GP[n]OD
Each UART has four individually assigned GPIO outputs as follows: UART0: GPIO0–GPIO3, UART1: GPIO4–GPIO7,
UART2: GPIO8–GPIO11, UART3: GPIO12–GPIO15. For example, for UART0: Bit 4 is GP0OD, Bit 5 is GP1OD, Bit 6 is
GP2OD, and Bit 7 is GP3OD (see Table 5).
Set GP[n]OD bits to 0 to configure the GPIO_s as push-pull outputs, if configured as outputs in GPIOConfg[3:0].
Set the GP[n]OD bits to 1 to configure to open-drain output operation.
When configured as inputs in GPIOConfg[3:0], the GPIO_s are high-impedance inputs with weak pulldowns.
Bits 3–0: GP[n]Out
Each UART has four individually assigned GPIO outputs as follows: UART0: GPIO0–GPIO3, UART1: GPIO4–GPIO7,
UART2: GPIO8–GPIO11, UART3: GPIO12–GPIO15. For example, for UART0: Bit 0 is GP0Out, Bit 1 is GP1Out, Bit 2 is
GP2Out, and Bit 3 is GP3Out (see Table 5).
The GP[n]Out bits configure the GPIO_ to be inputs or outputs. Set the GP[n]Out bits to 1 to configure the associated
GPIO_s as outputs. Set the GP[n]Out bits to 0 to configure the associated GPIOs as inputs.
Bits 7–4: GPI[n]Dat
Table 5. UART GPIO Assignments for GPIO Configuration
UART
UART0
UART1
UART2
UART3
GP3OD/GP3Out
GPIO3
GPIO7
GPIO11
GPIO15
GP2OD/GP2Out
GPIO2
GPIO6
GPIO10
GPIO14
GP1OD/GP1Out
GPIO1
GPIO5
GPIO9
GPIO13
GP0OD/GP0Out
GPIO0
GPIO4
GPIO8
GPIO12
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