MAX1463 Datasheet, PDF (43/49 Pages) Maxim Integrated Products – Low-Power Two-Channel Sensor Signal Processor

Low-Power Two-Channel Sensor
Signal Processor
Table 39. Module Registers Summary (continued)
Register 21h Timer Configuration
PS[3] PS[2] PS[1] PS[0] TO[11]
Register 30h OP AMP Configuration
x
x
x
x
x
Register 31h Power On Control
x
x
x
PWRW
x
FL
Register 32h Oscillator Control
TO[10]
x
x
TO[9]
x
x
TO[8]
x
PWRA2
D
TO[7]
x
x
TO[6] TO[5] TO[4]
x
x
x
X
PWRD PWRD
AC2 AC1
x
x
x OSC[4] OSC[3] OSC[2] OSC[1] OSC[0] x
x
x
x
Register 33h Current Source Control
x
x
x
x
x
x
x
x
x
x
x
x
Register 40h GPIO1 Control
x
x
x
x
x
x
x
x
x
x
OUT1 EN1
Register 41h GPIO2 Control
x
x
x
x
x
x
x
x
x
x
OUT2 EN2
TO[3] TO[2] TO[1] TO[1]
x
x
BUF2 BUF1
x
x
PWRO PWRO
P2
P1
x
x
x
ENCK
OUT
x ISRC[2] ISRC[1] ISRC[0]
IN1 CLR1 INV1 EDGE1
IN2 CLR2 INV2 EDGE2
Table 40. Internal Register Set Address
(IRSA) Decoding
IRSA[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010–1111
REGISTER
NIBBLE
ADDRESSED
DESCRIPTION
DHR[3:0]
DHR[7:4]
DHR[11:8]
DHR[15:12]
PFAR[3:0]
PFAR[7:4]
PFAR[11:8]
PFAR[15:12]
CR[3:0]
IMR[3:0]
—
Write IRSD[3:0] to DHR[3:0]
Write IRSD[3:0] to DHR[7:4]
Write IRSD[3:0] to DHR[11:8]
Write IRSD[3:0] to DHR[15:12]
Write IRSD[3:0] to PFAR[3:0]
Write IRSD[3:0] to PFAR[7:4]
Write IRSD[3:0] to PFAR[11:8]
Write IRSD[3:0] to PFAR[15:12]
Write IRSD[3:0] to CR[3:0]
Write IRSD[3:0] to IR[3:0]
Unused
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