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MAX1463 Datasheet, PDF (13/49 Pages) Maxim Integrated Products – Low-Power Two-Channel Sensor Signal Processor
Low-Power Two-Channel Sensor
Signal Processor
VDD
VDDF
INPn
OUTnSM
100Ω
5 VDC
OUT
SENSOR
MAX1463
INMn
0.47µF 0.1µF 100pF
VSS
GND
Figure 2. Basic Bridge Sensor Ratiometric Output Configuration
The CPU can be programmed to measure one or two
differential inputs plus the internal temperature sensor
defined in user-supplied algorithm. For example, the
differential inputs may be measured many times while
the temperature may be measured less frequently.
On-Chip Temperature Sensing
The on-chip temperature sensor is a diode that changes
-2mV/°C over the operating range. The ADC converts the
temperature sensor in a similar manner as the sensor
inputs. During an ADC conversion of the temperature
sensor, the ADC automatically uses the internal 1.25V
reference as the ADC full-scale reference. The tempera-
ture data format is 15-bit plus sign in two’s complement
format. There is no programmable gain adjustment for
the temperature sensor input. Offset compensation by
the CO DAC is provided so that the nominal temperature
measurement can be centered at the ADC output mid-
scale value. Additional digital gain and offset correction
can be provided by the CPU.
Output Format
There are two output modules in the MAX1463—DOP1
(DAC Op Amp PWM 1) and DOP2 (DAC Op Amp PWM
2). Each of the DOP modules contains a 16-bit DAC, a
12-bit digital PWM converter, a small op amp, and a
large op amp with high-output drive capability. Each
module can be configured in several different modes to
suit a wide range of output signal requirements. Either
the DAC or the PWM can be selected as the primary
output signal. The DAC output signal must be routed to
one of the two op amps before being made available to
a device pin. See the DAC, Op Amp, PWM Modules
section for details. Additional digital outputs are avail-
able on the GPIOs; 4–20mA output format can be
accomplished by using the unrouted op amp.
Initialization
A user-defined initialization routine is required to con-
figure the oscillator frequency and, if necessary, vari-
ous analog modules, e.g., PGA gain, ADC resolution,
ADC clock settings, etc. After the initialization routine,
the CPU can start execution of the main program.
Power-On Reset
The MAX1463 contains a POR circuit to disable CPU
execution until adequate VDD voltage is available for
operation. Once the power-on state has been reached,
the MAX1463 is kept under reset condition for 250µs
before the CPU starts execution. Below the VDD thresh-
old, all internal CPU registers are set to their POR
default state. Power-on control bits for internal modules
are reset to the OFF condition.
CPU Architecture
The CPU provides a wide range of functionality to be
incorporated in an embedded system. The CPU can
compensate nonlinear and temperature-dependent sen-
sors, check for over/underlimit conditions, output sensor
or temperature data as an analog signal or pulse-width-
modulated digital signal, and execute control strategies.
The CPU can perform a limited amount of signal pro-
cessing (filtering). A timer is included so that uniform
sampling (equally spaced ADC conversions) of the
input sensors can be performed.
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