MAX1463 Datasheet, PDF (19/49 Pages) Maxim Integrated Products – Low-Power Two-Channel Sensor Signal Processor

Low-Power Two-Channel Sensor
Signal Processor
Power Control
The power to various subcircuits in the MAX1463 can be
turned on and off by CPU control and by the serial inter-
face. Unused subcircuits and modules can be turned off
to reduce power consumption. The default state after
power-on is all subcircuits and modules powered off.
This enables low-power embedded systems to turn on
only the needed modules after exiting a low-power CPU
halt timer interval. Modules can be turned on and off as
needed; however, care must be exercised to allow for
module initialization and settling prior to use.
Oscillator Control
The MAX1463 has a fully integrated oscillator with a
nominal frequency of 4MHz. An external clock source
can be used when the clock select pin CKSEL = 0,
operating all internal timing functions. CKIO can also be
configured as an output source of the internal oscillator
clock. This enables synchronization of the MAX1463
with external circuits requiring a clock source.
Current-Source Module
The current-source module provides a means for exciting
resistive bridge sensors with current sourced from V_DD.
The current source can also be used for general-purpose
functions that may be required in an embedded control
system. The amount of current sourced is set in the
Current Source_Control register. The current source is
referenced to the MAX1463 internal bandgap voltage ref-
erence and is independent of supply voltage changes.
Figure 7 is the current-source mode.
GPIO Module
The MAX1463 contains two general-purpose digital
input/output (GPIO) modules, GPIO1 and GPIO2, which
can be written and read by CPU control and by the ser-
ial interface. These two I/O pins operate independently
of each other. They can be configured as inputs, out-
puts, or one input and one output. When configured as
an input, there are two modes of sensing digital inputs;
as a voltage or logic level, or as an edge detector. In
edge-detector mode, either a rising or falling edge can
be selected for detection. A bit is set in the GPIO con-
trol register upon detection of the selected edge.
The GPIO pins have nominal 100kΩ pulldown resistors
to V_SS as in Figure 6. Pulldown resistors provide a low
logic level when the pin is unconnected. The GPIO may
also serve as an input pin and its state is read from the
GPIO control register (Tables 28 and 29). When using
the GPIO pin as a general-purpose output, its output
state is defined by writing to the GPIO control register.
The GPIOn pins may be configured as an alert output
that goes low or high whenever a fault condition hap-
pens, e.g., remote sensor line disconnection, overflow
conditions in the CPU program execution, etc.
All input and output control for the GPIO1 and GPIO2
pins are contained in GPIO1_Control (address = 40h)
and GPIO2_Control (address = 41h), respectively.
Figure 8 shows the GPIO1 and GPIO2 modules.
Serial Interface Timing and Operation
The MAX1463 serial interface is a high-speed asyn-
chronous data input and output communication port,
providing access to internal registers for calibration of
embedded control sensor systems. All the FLASH
memory is read and write accessible by the serial inter-
face for programming of instruction code and calibra-
tion coefficients. The MAX1463 serial interface can
operate in 4-wire SPI-compatible mode or in a 3-wire
mode (default on power-up). In 3-wire mode, the DI
and DO lines can be tied together, forming a bidirec-
tional data line. The serial interface lines consist of
chip-select (CS), serial clock (SCLK), data in (DI), and
data out (DO).
The MAX1463 serial interface is selected by asserting
CS low. The serial input clock, SCLK, is gated internally
to begin sequencing the DI input data and outputting
the output data onto DO. When CS rises, the data that
was clocked into DI is loaded into an internal register
set (IRS[7:0]). The MAX1463 chip select line CS cannot
be tied low continuously for normal operation.
The serial interface can be used both during sensor
calibration, as well as during normal operation.
Each byte of data written into the MAX1463 serial port
contains a 4-bit addresses nibble (IRSA [3:0]) and a 4-
bit data nibble (IRSD [3:0]). The IRS register holds both
the IRSD and IRSA nibbles as follows:
IRS [7:0] = IRSD [3:0], IRSA [3:0]
Four bytes of IRS information must be written into the
serial interface to transfer 16 bits of data through IRSD
into a MAX1463 internal register. All serial data written
into the MAX1463 is transferred through the IRS regis-
ter. The DI is read in with the LSB of the IRSA nibble
first and the MSB of the IRSD nibble last. Figure 9
shows serial interface data input.
The IRSA bits are decoded to determine which register
the IRSD bits should be latched into. The IRSA bits can
address the data holding register (DHR), the
port/FLASH addresses register (PFAR), the command
register (CR), and the interface mode register (IMR).
All serial data read from the serial interface is sourced
from the 16-bit DHR. Any data to be read by the serial
interface must first be placed into the internal DHR reg-
ister before being accessible for reading by the serial
interface.
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