DS89C420_05 Datasheet, PDF (22/47 Pages) Maxim Integrated Products – Ultra-High-Speed Microcontroller

DS89C420 Ultra-High-Speed Microcontroller
Table 3. Flash Memory Lock Bits
LEVEL
LB1
LB2
LB3
1
1
1
1
2
0
1
1
3
X
0
1
4
X
X
0
PROTECTION
No program lock. Encrypted verify if encryption array is programmed.
Prevent MOVC in external memory from reading program code in internal
memory. EA is sampled and latched on reset. Allow no further parallel or
program memory loader programming.
Level 2 plus no verify operation. Also prevent MOVX in external memory
from reading internal SRAM.
Level 3 plus no external execution.
The DS89C420 provides user-selectable options that must be set before beginning software execution. The option
control register uses flash bits rather than SFRs, and is individually erasable and programmable as a byte-wide
register. Bit 3 of this register is defined as the watchdog POR default. Setting this bit to 1 disables the watchdog-
reset function on power-up, and clearing this bit to 0 enables the watchdog-reset function automatically. Other bits
of this register are undefined and are at logic 1 when read. The value of this register can be read at address FCh in
parallel programming mode or when executing a verify-option control-register instruction in ROM loader mode.
The signature bytes can be read in ROM loader mode or in parallel programming mode. Reading data from
addresses 30h, 31h, and 60h provides signature information about manufacturer, part, and extension as follows:
ADDRESS VALUE
30h DAh
31h 42h
60h 01h
FUNCTION
Manufacturer ID
DS89C420 Device ID
Device Extension
ROM LOADER
The full 16kB of on-chip flash program-memory space, security flash block, and external SRAM can be
programmed in-system from an external source through serial port 0 under the control of a built-in ROM loader.
The ROM loader also has an auto-baud feature that determines which baud rate frequencies are being used for
communication and sets up the baud rate generator for communication at that frequency.
When the DS89C420 is powered up and has entered its user operating mode, the ROM loader mode can be
invoked at any time by forcing RST = 1, EA = 0, and PSEN = 0. It remains in effect until power-down or when the
condition (RST = 1 and PSEN = EA = 0) is removed. Entering the ROM loader mode forces the processor to start
fetching from the 2kB internal ROM for program memory initialization and other loader functions.
The read/write accessibility is determined by the state of the lock bits, which can be verified directly by the ROM
loader. In the ROM loader mode, a mass-erase operation also erases the memory bank select and sets it to the
default state. Otherwise, the memory bank select cannot be altered in the ROM loader mode.
The flash memory can be programmed (by the built-in ROM loader) using commands that are received over the
serial interface from a host PC. Full details of the ROM loader commands are given in the Ultra-High-Speed Flash
Microcontroller User’s Guide. Host software to communicate with the ROM loader is available in Windows format
as well as other platforms. Contact our technical support department at [e-mail] for more
information.
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