DS89C420_05 Datasheet, PDF (19/47 Pages) Maxim Integrated Products – Ultra-High-Speed Microcontroller

DS89C420 Ultra-High-Speed Microcontroller
external MOVX data memory access. The lower 128 bytes of on-chip flash memory store reset and interrupt
vectors. The program memory ROMSIZE feature allows software to dynamically configure the maximum address of
on-chip program memory. This allows the DS89C420 to act as a bootloader for an external flash or NV SRAM. It
also enables the use of the overlapping external program spaces. 256 bytes of on-chip RAM serve as a register
area and program stack, which are separated from the data memory.
REGISTER SPACE
Registers are located in the 256 bytes of on-chip RAM, which can be divided into two subareas of 128 bytes each
as illustrated in Figure 6. Separate classes of instructions are used to access the registers and the program/data
memory. The upper 128 bytes are overlapped with the 128 bytes of SFRs in the memory map. Indirect addressing
accesses the upper 128 bytes of scratchpad RAM, and direct addressing accesses the SFR area. Direct or indirect
addressing can access the lower 128 bytes.
There are four banks of eight individual working registers in the lower 128 bytes of scratchpad RAM. The working
registers are general-purpose RAM locations that can be addressed within the selected bank by any instructions
that use R0–R7. The register bank selection is controlled through the program status register in the SFR area. The
contents of the working registers can be used for indirectly addressing the upper 128 bytes of scratchpad RAM.
To support the Boolean operations, there are individually addressable bits in both the RAM and SFR areas. In the
scratchpad RAM area, registers 20h–2Fh are bit-addressable by software using Boolean operation instructions.
Another use of the scratchpad RAM area is for the stack. The stack pointer in the SFRs is used to select storage
locations for program variables and for return addresses of control operations.
MEMORY CONFIGURATION
As illustrated in Figure 6, the DS89C420 incorporates two 8kB flash memories for on-chip program memory and
1kB of SRAM for on-chip data memory or a particular range (400–7FF) of “alternate” program memory space. The
DS89C420 uses an address scheme that separates program memory from data memory, such that the 16-bit
address bus can address each memory area up to 64kB.
PROGRAM MEMORY ACCESS
On-chip program memory begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding the
maximum address of on-chip program memory causes the device to access off-chip memory. However, the
maximum on-chip decoded address is selectable by software using the ROMSIZE feature. Software can cause the
DS89C420 to behave like a device with less on-chip memory. This is beneficial when overlapping external memory
is used. The maximum memory size is dynamically variable. Thus, a portion of memory can be removed from the
memory map to access off-chip memory, then be restored to access on-chip memory. In fact, all of the on-chip
memory can be removed from the memory map allowing the full 64kB memory space to be addressed from off-chip
memory. Program memory addresses that are larger than the selected maximum are automatically fetched from
outside the part through ports 0 and 2 (Figure 6).
The ROMSIZE register is used to select the maximum on-chip decoded address for program memory. Bits RMS2,
RMS1, RMS0 have the following effect:
RMS2
0
0
0
0
1
1
1
1
RMS1
0
0
1
1
0
0
1
1
RMS0
ADDRESS
0
1
0
1
0
1
0
1
MAXIMUM ON-CHIP
PROGRAM MEMORY
0k
1k/03FFh
2k/07FFh
4k/0FFFh
8k/1FFFh
16k (default)/3FFFh
Invalid–Reserved
Invalid–Reserved
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