M08035 Datasheet, PDF (8/49 Pages) M/A-COM Technology Solutions, Inc. – SD, HD, 3G Multi-rate Reclocker

Electrical Characteristics
Table 1-8. Reclocker Specifications (M08045)
Symbol
Parameter
Conditions
t_LOCK
F_{LBW, PEAK}
F_LBW
Lock time (asynchronous)
Loop bandwidth peaking
Loop bandwidth
(nominal setting)
Automatic rate detection enabled
3G operation (2.97 Gbps)
HD operation (1.485 Gbps)
SD operation (270 Mbps)
J_TOL
Input jitter tolerance
J_GEN
Total Output jitter
3G, HD, and SD operation
3G operation (2.97 Gbps)
HD operation (1.485 Gbps)
SD operation (270 Mbps)
NOTE:
1. 0.2 UI input jitter applied at SDI input.
2. Measured with PRBS2¹⁰-1.
3. Input jitter = 20 ps p-p.
Note
1
1
1
1
1
2
2, 3
2, 3
2, 3
Minimum
—
—
—
—
—
> 0.6
—
—
—
Typical
—
0.1
1.7
0.85
0.17
—
0.07
0.04
0.02
Maximum
6
—
—
—
—
—
0.11
0.06
0.05
Unit
ms
dB
MHz
UI p-p
UI p-p
Table 1-9. XTALP/N and Reference Clock Electrical Specifications
Symbol
Parameter
Note
Minimum
Typical
Maximum
Unit
F_REF
XTAL/Ref clock frequency
3
—
F_REF, ppm XTAL/Ref clock frequency accuracy
—
-100
C_LOAD
XTAL load capacitance
1
—
CLOCK_JITT Jitter (RMS)
2, 4
—
CLOCK_DCT Reference clock duty cycle
2
40
tolerance
27
—
MHz
0
100
ppm
20
—
pF
—
1
ps
—
60
%
R_IN
Input impedance
2, 5
200
750
1500
Ω
V_IN
Input amplitude
2
0.8
—
1.2
V
t_R/t_F
Rise/Fall time
2, 6
—
2
6
ns
NOTE:
1. This capacitance is supplied internally (no external cap is required).
2. When using an external reference clock source, this should be AC coupled through a 0.1 µF capacitor.
3. When using an external clock a small increase in jitter may be seen. For best performance a crystal is recommended.
4. Jitter bandwidth is from 12 kHz to 20 MHz.
5. Measured with TDR module.
6. 10% to 90% rise and fall times.
M08035, M08045 Data Sheet V1
MACOM™
8
080x5-DSH-001