M08035 Datasheet, PDF (48/49 Pages) M/A-COM Technology Solutions, Inc. – SD, HD, 3G Multi-rate Reclocker

Control Registers Map and Descriptions
Register Address: 85h
Default:
00h
Register Name: Alarm Clear
Description:
Clears Latched Alarms. To properly clear all alarm bits, write “1” followed by a “0” to bit 0.
Bit
Bit Description
7:2 Reserved
1 0b: Normal operation
1b: Soft reset for Reclocker (for master reset use reg 80h)
0 0b: Normal operation
1b: Clears all alarm bits in registers 83h, 84h and 88h
Register Address: 87h
Default:
00h
Register Name: Checksum result
Description:
Shows the result of the checksum calculation
Bit
Bit Description
7:0 Checksum result
Register Address: 88h
Default:
00h
Register Name: Reclocker Status Register
Description:
Reads status of the Reclocker
Bit
7:6 Reserved
5 0b: Reference clock is present
1b: Reference clock is not present
4 0b: PLL locked
1b: PLL unlocked
3:1 Reserved
0 0b: Reclocker, locked
1b: Reclocker, un-locked
Bit Description
Register Address: 89h
Default:
00h
Register Name: Reclocker Rate Detect
Description:
Reads data rate for Reclocker
Bit
Bit Description
7:2 Reserved
1:0 00b: Reclocker: un-locked
01b: Reclocker: SD data rate detected
10b: Reclocker: HD data rate detected
11b: Reclocker: 3G data rate detected (M08045)
Default
R/W
000000b
R/W
0b
R/W
0b
R/W
Default
R/W
00000000b
R/W
Default
R/W
00b
R
0b
R
0b
R
XXXb
R
0b
R
Default
R/W
XXXXXXb
R
00b
R
M08035, M08045 Data Sheet V1
MACOM™
48
080x5-DSH-001