M08035 Datasheet, PDF (42/49 Pages) M/A-COM Technology Solutions, Inc. – SD, HD, 3G Multi-rate Reclocker

Control Registers Map and Descriptions
Register Address: 06h
Default:
20h
Register Name: LOS Config/CLK EN
Description:
Sets configuration for Loss of Signal alarm/Enables serial clock output buffer
Bit
Bit Description
7:5 000b: 70 mV_PPD assert, 80 mV_PPD de-assert
001b: 80 mV_PPD assert, 90 mV_PPD de-assert [default]
010b: 90 mV_PPD assert, 100 mV_PPD de-assert
011b: 100 mV_PPD assert, 110 mV_PPD de-assert
100b: 110 mV_PPD assert, 120 mV_PPD de-assert
101b: 120 mV_PPD assert, 130 mV_PPD de-assert
110b: 130 mV_PPD assert, 140 mV_PPD de-assert
111b: LOS power down (globally applied for all input channels)
4 0b: Normal LOS operation
1b: Force LOS to asserted
3 0b: Squelch input upon LOS assertion
1b: Never squelch input upon LOS assertion
2 0b: Squelch to logic high state
1b: Squelch to logic low state
1 Reserved
0 0b: Serial clock output is disabled
1b: Serial clock output is enabled (output level controlled by reg0Bh[3:2])
Register Address: 07h
Default:
40h
Register Name: Input Mux Control
Description:
Selects the input that is selected for the serial data output
Bit
Bit Description
7:2 Reserved
1:0 00b: select input 0 to SDO
01b: select input 1 to SDO
10b: select input 2 to SDO
11b: select input 3 to SDO
Default
R/W
001b
R/W
0b
R/W
0b
R/W
0b
R/W
0b
R/W
0b
R/W
Default
R/W
010000b
R/W
00b
R/W
M08035, M08045 Data Sheet V1
MACOM™
42
080x5-DSH-001