M08035 Datasheet, PDF (47/49 Pages) M/A-COM Technology Solutions, Inc. – SD, HD, 3G Multi-rate Reclocker

Control Registers Map and Descriptions
Register Address: 81h
Default:
0Bh
Register Name: Chip ID
Description:
Chip Identification Number
Bit
7:0 M08035/M08045
Bit Description
Default
R/W
N/A
R
Register Address: 82h
Default:
04h
Register Name: Chip Rev
Description:
Chip Revision
Bit
7:0 Chip revision
Bit Description
Default
R/W
00000100b
R
Register Address: 83h
Default:
00h
Register Name: LOS Status 0
Description:
Inputs 0-1, Set to a '1' when LOS asserted (single-event latched operation). Proper status is obtained after clearing all latched
alarms by using Register 85h bit 0.
Bit
Bit Description
Default
R/W
7:6 Reserved
5 0b: SDI1, Input present
1b: SDI1, LOS Asserted
4:3 Reserved
2 0b: SDI0, Input present
1b: SDI0, LOS Asserted
1:0 Reserved
00b
R
0b
R
00b
R
0b
R
00b
R
Register Address: 84h
Default:
00h
Register Name: LOS Status 1
Description:
Inputs 2-3, Set to a '1' when LOS asserted (single-event latched operation). Proper status is obtained after clearing all latched
alarms by using Register 85h bit 0.
Bit
Bit Description
Default
R/W
7:6 Reserved
5 0b: SDI3, Input present
1b: SDI3, LOS Asserted
4:2 Reserved
1 0b: SDI2, Input present
1b: SDI2, LOS Asserted
0 Reserved
00b
R
0b
R
000b
R
0b
R
0b
R
M08035, M08045 Data Sheet V1
MACOM™
47
080x5-DSH-001