M08035 Datasheet, PDF (44/49 Pages) M/A-COM Technology Solutions, Inc. – SD, HD, 3G Multi-rate Reclocker

Control Registers Map and Descriptions
Register Address: 0Ch
Default:
02h
Register Name: SDOB Control
Description:
Enable for second data output.
Bit
7:3 Reserved
2 0b: SDOB output disabled
1b: SDOB output enabled
1:0 Reserved
Bit Description
Register Address: 0Dh
Default:
00h
Register Name: Global Control1
Description:
Controls Global Configuration
Bit
Bit Description
7:4 Reserved
3 0b: Inputs that are not used are powered down
1b: All inputs are forced on
2 Reserved
1 0b: Input offset correction loop On (all inputs)
1b: Input offset correction loop Off (all inputs)
0 0b: Normal Operation
1b: Global Power Down
Register Address: 0Eh
Default:
00h
Register Name: Interrupt Control
Description:
Sets configuration for xALARM Output pin
Bit
Bit Description
7:4 Reserved
3 0b: xALARM output is used in Interrupt mode
1b: Not supported
2:0 000b: xALARM pulse width = 140 ns
001b: xALARM pulse width = 180 ns
010b: xALARM pulse width = 200 ns
011b: xALARM pulse width = 300 ns
100b: xALARM pulse width = 450 ns
101b: xALARM pulse width = 800 ns
110b: xALARM pulse width = 1.5 µs
111b: xALARM pulse width = 2.8 µs
Measured with a 10 kΩ pull up resistor. Actual pulse width varies with the value of the pull-up resistor.
Default
R/W
00000b
R/W
0b
R/W
10b
R/W
Default
R/W
0000b
R/W
0b
R/W
0b
R/W
0b
R/W
0b
R/W
Default
R/W
00000b
R/W
0b
R/W
000b
R/W
M08035, M08045 Data Sheet V1
MACOM™
44
080x5-DSH-001