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LTC3838-2_15 Datasheet, PDF (26/56 Pages) Linear Technology – Dual, Fast, Accurate Step-Down DC/DC Controller with xternal Reference Voltage and Dual Differential Output Sensing
LTC3838-2
APPLICATIONS INFORMATION
To maintain a good signal-to-noise ratio for the current
sense signal, start with a ∆VSENSE of 10mV. For a DCR
sensing application, the actual ripple voltage will be de-
termined by:
∆VSENSE
=
VIN – VOUT
R1• C1
•
VOUT
VIN • f
Power MOSFET Selection
Two external N-channel power MOSFETs must be selected
for each channel of the LTC3838-2 controller: one for the
top (main) switch and one for the bottom (synchronous)
switch. The gate drive levels are set by the DRVCC voltage.
This voltage is typically 5.3V. Pay close attention to the
BVDSS specification for the MOSFETs as well; most of the
logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the on-
resistance, RDS(ON), Miller capacitance, CMILLER, input
voltage and maximum output current. Miller capacitance,
CMILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data sheet.
CMILLER is equal to the increase in gate charge along the
horizontal axis while the curve is approximately flat (or
the parameter QGD if specified on a manufacturer’s data
sheet), divided by the specified VDS test voltage:
CMILLER
≅
QGD
VDS( TEST )
When the IC is operating in continuous mode, the duty
cycles for the top and bottom MOSFETs are given by:
DTOP
=
VOUT
VIN
DBOT
= 1–
VOUT
VIN
The MOSFET power dissipations at maximum output
current are given by:
( ) PTOP = DTOP • IOUT(MAX)2 • RDS(ON)(MAX) 1+ δ + VIN2
•  IOUT(2MAX )



• CMILLER



RTG(UP)
VDRVCC – VMILLER
+
RTG(DOWN)
VMILLER

•

f
 PBOT = DBOT • IOUT(MAX)2 • RDS(ON)(MAX) • (1 + δ )
where δ is the temperature dependency of RDS(ON), RTG(UP)
is the TG pull-up resistance, and RTG(DOWN) is the TG pull-
down resistance. VMILLER is the Miller effect VGS voltage
and is taken graphically from the MOSFET ’s data sheet.
Both MOSFETs have I2R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For VIN < 20V,
the high current efficiency generally improves with larger
MOSFETs, while for VIN > 20V, the transition losses rapidly
increase to the point that the use of a higher RDS(ON) device
with lower CMILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs temperature curve in the
power MOSFET data sheet. For low voltage MOSFETs,
0.5% per degree (°C) can be used to estimate δ as an
approximation of percentage change of RDS(ON):
δ = 0.005/°C • (TJ – TA)
where TJ is estimated junction temperature of the MOSFET
and TA is ambient temperature.
26
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38382f