LTC3838-2_15 Datasheet, PDF (10/56 Pages) Linear Technology – Dual, Fast, Accurate Step-Down DC/DC Controller with xternal Reference Voltage and Dual Differential Output Sensing

LTC3838-2
PIN FUNCTIONS
V_DFB2+ (Pin 1): Differential Feedback Amplifier Positive
(+) Input of Channel 2. As shown in the Functional Dia-
gram, connect this pin to a 3-resistor feedback divider
network, which is composed of R_DFB1 and R_DFB2 from
this pin to the negative and positive terminals of V_OUT2
respectively, and a third resistor from this pin to the re-
mote ground of external reference voltage (V_REF2–). The
third resistor must have a value equal to R_DFB1//R_DFB2
for accurate differential regulation. With the 3-resistor
feedback divider network, the LTC3838-2 will regulate the
differential output (V_OUT2+ – V_OUT2–) to (V_REF2+ – V_REF2–)
• (R_DFB1 + R_DFB2)/R_DFB1.
EXTV_REF2 (Pin 2): External Reference Voltage for Channel 2.
Connect this pin to the positive (+) terminal of external
reference voltage (V_REF2+). The internal feedback voltage
V_FB2 (i.e., 2 • V_DFB2+ – V_DFB2–) will be regulated to the
voltage on this pin, so that the differential V_OUT2 equals
(V_REF2+ – V_REF2–) • (R_DFB1 + R_DFB2)/R_DFB1. When this pin
is less than around 100mV, the TRACK/SS2 pin will be
pulled to ground to keep channel 2 from switching. Channel
2’s overvoltage and undervoltage thresholds are ±7.5% of
this EXTV_REF2 pin voltage. For valid PGOOD2 signal upon
startup and to avoid prebiased V_OUT2 (if any) being pulled
down, apply EXTV_REF2 before RUN2 is enabled. Normal
operations are only guaranteed with an EXTV_REF2 of 0.4V
minimum and 1.5V maximum at INTV_CC ≥ 4V, or 2.5V
maximum at INTV_CC ≥ 5V. Note its small bias current (see
the Electrical Characteristics section) may cause offset if
external R-C filter is connected to this pin for either limit-
ing voltage slew rate or filtering noise.
MODE/PLLIN (Pin 5): Operation Mode Selection or Exter-
nal Clock Synchronization Input. When this pin is tied to
INTV_CC, forced continuous mode operation is selected. Ty-
ing this pin to SGND allows discontinuous mode operation.
When an external clock is applied at this pin, both channels
operate in forced continuous mode and synchronize to the
external clock. This pin has an internal 600k pull-down
resistor to SGND.
CLKOUT (Pin 6): Clock Output of Internal Clock Genera-
tor. Its output level swings between INTV_CC and SGND.
If clock input is present at the MODE/PLLIN pin, it will
be synchronized to the input clock, with phase set by the
PHASMD pin. If no clock is present at MODE/PLLIN, its
frequency will be set by the RT pin. To synchronize other
controllers, it can be connected to their MODE/PLLIN pins.
SGND (Pin 7): Signal Ground. All small-signal analog and
compensation components should be connected to this
ground. Connect SGND to the exposed pad and PGND pin
using a single PCB trace.
RT (Pin 8): Clock Generator Frequency Programming Pin.
Connect an external resistor from RT to SGND to program
the switching frequency between 200kHz and 2MHz. An
external clock applied to MODE/PLLIN should be within
±30% of this programmed frequency to ensure frequency
lock. When the RT pin is floating, the frequency is internally
set to be slightly under 200kHz.
PHASMD (Pin 9): Phase Selector Input. This pin
determines the relative phases of channels and the
CLKOUT signal. With zero phase being defined as the
rising edge of TG1: Pulling this pin to SGND locks TG2 to
180°, and CLKOUT to 60°. Connecting this pin to INTV_CC
locks TG2 to 240° and CLKOUT to 120°. Floating this pin
locks TG2 to 180° and CLKOUT to 90°.
ITH1, ITH2 (Pin 10, Pin 3): Current Control Threshold. This
pin is the output of the error amplifier and the switching
regulator’s compensation point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V, with 0.8V corresponding to zero
sense voltage (zero inductor valley current).
TRACK/SS1, TRACK/SS2 (Pin 11, Pin 4): External Track-
ing and Soft-Start Input. Channel 1 regulates the feedback
voltage V_FB1 = V_OUTSENSE1+ – V_{OUTSENSE1–} to the smaller
of 0.6V or the voltage on the TRACK/SS1 pin. Channel 2
regulates the V_FB2 = 2 • V_DFB2+ – V_DFB2– to the smaller
of the voltage on the EXTV_REF2 pin or the voltage on the
TRACK/SS2 pin. An internal 1µA temperature-independent
pull-up current source is connected to each TRACK/SS
pin. A capacitor to ground at this pin sets the ramp time
to the final regulated output voltage. Alternatively, another
voltage supply connected to this pin allows the output to
track the other supply during start-up. In applications that
operate simultaneously at both high EXTV_REF2 (>1.5V)
and low V_IN (<6V) pin voltages, external pull-up (resistor
or fixed current from INTV_CC) may be required so that
TRACK/SS2 rises well above EXTV_REF2.
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