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LTC3838-2_15 Datasheet, PDF (15/56 Pages) Linear Technology – Dual, Fast, Accurate Step-Down DC/DC Controller with xternal Reference Voltage and Dual Differential Output Sensing
LTC3838-2
OPERATION (Refer to Functional Diagram)
Both channels adjust outputs through system feedback
loops so that the internally-generated single-ended feed-
back voltages (VFB1,2 in the Functional Diagram) equal
either the internal 0.6V reference (for channel 1) or the
EXTVREF2 = VREF2+ (for channel 2) when in regulation.
Therefore, the differential VOUT1 is regulated to 0.6V • (RFB1
+ RFB2)/RFB1, and the differential VOUT2 is regulated to
(VREF2+ – VREF2–) • (RDFB1 + RDFB2)/RDFB1. Such schemes
eliminate any ground offsets between local ground and
remote output ground, resulting in a more accurate output
voltage. Channel 1 allows remote output ground to deviate
as much as ±500mV, and channel 2 allows as much as
±200mV, with respect to local ground (SGND).
Channel 2 senses the external reference voltage VREF2 dif-
ferentially. The positive terminal of the external reference
VREF2+ is fed into the EXTVREF2 pin. The remote ground
of the external reference VREF2– is connected to the third
resistor in the external output voltage feedback network.
The IC itself does not see the VREF2– directly, but to keep
the regulation accuracy, the common mode voltage of the
external reference is practically limited by the voltages on
EXTVREF2 pin as specified in the Electrical Characteristic
table, and the VDFB2+ pin (≥ –0.2V), etc.
DRVCC/EXTVCC/INTVCC Power
DRVCC1,2 are the power for the bottom MOSFET drivers.
Normally the two DRVCC pins are shorted together on
the PCB, and decoupled to PGND with a minimum 4.7µF
ceramic capacitor, CDRVCC. The top MOSFET drivers are
biased from the floating bootstrap capacitors (CB1,2)
which are recharged during each cycle through an external
Schottky diode when the top MOSFET turns off and the
SW pin swings down.
The DRVCC can be powered two ways: an internal low-
dropout (LDO) linear voltage regulator that is powered
from VIN and can output 5.3V to DRVCC1. Alternatively,
an internal EXTVCC switch (with on-resistance of around
2Ω) can short the EXTVCC pin to DRVCC2.
If the EXTVCC pin is below the EXTVCC switchover voltage
(typically 4.6V with 200mV hysteresis, see the Electri-
cal Characteristics Table), then the internal 5.3V LDO is
enabled. If the EXTVCC pin is tied to an external voltage
source greater than this EXTVCC switchover voltage, then
the LDO is shut down and the internal EXTVCC switch
shorts the EXTVCC pin to the DRVCC2 pin. In this case,
DRVCC and INTVCC draw power from the external voltage
source which helps to increase overall efficiency and de-
crease internal self heating from power dissipated in the
LDO. If the output voltage of the converter itself is above
the upper switchover voltage limit (4.8V), it can provide
power for EXTVCC. The VIN pin still needs to be powered
up but now draws minimum current.
Power for most internal control circuitry other than gate
drivers is derived from the INTVCC pin. INTVCC can be pow-
ered from the combined DRVCC pins through an external
RC filter to SGND to filter out noises due to switching.
Shutdown and Start-Up
Each of the RUN1 and RUN2 pins has an internal proportion-
al-to-absolute-temperature (PTAT) current source (around
1.2µA at 25°C) to pull up the pins. Taking both RUN1 and
RUN2 pins below a certain threshold voltage (around 0.8V
at 25°C) shuts down all bias of INTVCC and DRVCC and
places the LTC3838-2 into micropower shutdown mode
with a minimum IQ at the VIN pin. The LTC3838-2’s DRVCC
(through the internal 5.3V LDO regulator or EXTVCC) and
the corresponding channel’s internal circuitry off INTVCC
will be biased up when either or both RUN pins are pulled
up above the 0.8V threshold, either by the internal pull-up
current or driven directly by an external voltage source
such as a logic gate output.
A channel of the LTC3838-2 will not start switching until
the RUN pin of the respective channel is pulled up to 1.2V.
When a RUN pin rises above 1.2V, the corresponding
channel’s TG and BG drivers are enabled, and TRACK/
SS released. An additional 5µA temperature-independent
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