IS66WVD1M16ALL Datasheet, PDF (29/52 Pages) Integrated Silicon Solution, Inc – Single device supports asynchronous and burst operation

IS66WVD1M16ALL
Notes:
1. Input signals may overshoot to VDDQ + 1.0V for periods less than 2ns during transitions.
2. Input signals may undershoot to Vss – 1.0V for periods less than 2ns during transitions.
3. BCR[5:4] = 01b (default setting of one-half drive strength).
4. This parameter is specified with the outputs disabled to avoid external loading effects.
User must add required current to drive output capacitance expected in the actual system.
5. ISB (MAX) values measured with PAR set to FULL ARRAY at +85°C. In order to achieve low
standby current, all inputs must be driven to either VDDQ or VSS. ISB might be set slightly
higher for up to 500ms after power-up, or when entering standby mode.
Table 13. Deep Power-Down Specifications
Description
Deep Power-Down
Conditions
VIN=VDDQ or 0V
VDD,VDDQ=1.95V, +85°C
Symbol
I_DPD
TYP
3
Notes:
Typical (TYP) I_DPD value applies across all operating temperatures and voltages.
MAX
10
Unit
uA
Table 14. Capacitance
Description
Input Capacitance
Input/Output Capacitance (ADQ)
Conditions
TC=+25°C;
f=1Mhz;
VIN=0V
Symbol
C_IN
C_IO
MIN
2.0
3.0
MAX
6.0
6.5
Notes:
1. These parameters are verified in device characterization and are not 100% tested.
Unit
pF
pF
Note
1
1
Figure 15. AC Input/Output Reference Waveform
VDDQ
∫∫
VDDQ/2² Output
Test Points
VDDQ/2³ Output
VSS
∫∫
Notes:
1. AC test inputs are driven at VDDQ for a logic 1 and VSS for a logic 0. Input rise and fall times
(10% to 90%) < 1.6ns.
2. Input timing begins at VDDQ/2.
3. Output timing ends at VDDQ/2.
Figure 16. Output Load Circuit
Test Point
50Ω
DUT
30pF
VDDQ/2
Notes:
All tests are performed with the outputs configured for default setting of half drive strength (BCR[5:4] = 01b).
Rev. A | July 2013
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